accel/qaic: Add AIC200 support
[drm/drm-misc.git] / tools / perf / util / mem-events.h
blob8dc27db9fd52f48ac925730e554199efd371b569
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __PERF_MEM_EVENTS_H
3 #define __PERF_MEM_EVENTS_H
5 #include <stdbool.h>
6 #include <linux/types.h>
8 struct perf_mem_event {
9 bool supported;
10 bool ldlat;
11 u32 aux_event;
12 const char *tag;
13 const char *name;
14 const char *event_name;
17 enum {
18 PERF_MEM_EVENTS__LOAD,
19 PERF_MEM_EVENTS__STORE,
20 PERF_MEM_EVENTS__LOAD_STORE,
21 PERF_MEM_EVENTS__MAX,
24 struct evsel;
25 struct mem_info;
26 struct perf_pmu;
28 extern unsigned int perf_mem_events__loads_ldlat;
29 extern struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX];
30 extern bool perf_mem_record[PERF_MEM_EVENTS__MAX];
32 int perf_pmu__mem_events_parse(struct perf_pmu *pmu, const char *str);
33 int perf_pmu__mem_events_init(void);
35 struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int i);
36 struct perf_pmu *perf_mem_events_find_pmu(void);
37 int perf_pmu__mem_events_num_mem_pmus(struct perf_pmu *pmu);
38 bool is_mem_loads_aux_event(struct evsel *leader);
40 void perf_pmu__mem_events_list(struct perf_pmu *pmu);
41 int perf_mem_events__record_args(const char **rec_argv, int *argv_nr);
43 int perf_mem__tlb_scnprintf(char *out, size_t sz, const struct mem_info *mem_info);
44 int perf_mem__lvl_scnprintf(char *out, size_t sz, const struct mem_info *mem_info);
45 int perf_mem__snp_scnprintf(char *out, size_t sz, const struct mem_info *mem_info);
46 int perf_mem__lck_scnprintf(char *out, size_t sz, const struct mem_info *mem_info);
47 int perf_mem__blk_scnprintf(char *out, size_t sz, const struct mem_info *mem_info);
49 int perf_script__meminfo_scnprintf(char *bf, size_t size, const struct mem_info *mem_info);
51 struct c2c_stats {
52 u32 nr_entries;
54 u32 locks; /* count of 'lock' transactions */
55 u32 store; /* count of all stores in trace */
56 u32 st_uncache; /* stores to uncacheable address */
57 u32 st_noadrs; /* cacheable store with no address */
58 u32 st_l1hit; /* count of stores that hit L1D */
59 u32 st_l1miss; /* count of stores that miss L1D */
60 u32 st_na; /* count of stores with memory level is not available */
61 u32 load; /* count of all loads in trace */
62 u32 ld_excl; /* exclusive loads, rmt/lcl DRAM - snp none/miss */
63 u32 ld_shared; /* shared loads, rmt/lcl DRAM - snp hit */
64 u32 ld_uncache; /* loads to uncacheable address */
65 u32 ld_io; /* loads to io address */
66 u32 ld_miss; /* loads miss */
67 u32 ld_noadrs; /* cacheable load with no address */
68 u32 ld_fbhit; /* count of loads hitting Fill Buffer */
69 u32 ld_l1hit; /* count of loads that hit L1D */
70 u32 ld_l2hit; /* count of loads that hit L2D */
71 u32 ld_llchit; /* count of loads that hit LLC */
72 u32 lcl_hitm; /* count of loads with local HITM */
73 u32 rmt_hitm; /* count of loads with remote HITM */
74 u32 tot_hitm; /* count of loads with local and remote HITM */
75 u32 lcl_peer; /* count of loads with local peer cache */
76 u32 rmt_peer; /* count of loads with remote peer cache */
77 u32 tot_peer; /* count of loads with local and remote peer cache */
78 u32 rmt_hit; /* count of loads with remote hit clean; */
79 u32 lcl_dram; /* count of loads miss to local DRAM */
80 u32 rmt_dram; /* count of loads miss to remote DRAM */
81 u32 blk_data; /* count of loads blocked by data */
82 u32 blk_addr; /* count of loads blocked by address conflict */
83 u32 nomap; /* count of load/stores with no phys addrs */
84 u32 noparse; /* count of unparsable data sources */
87 struct hist_entry;
88 int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi);
89 void c2c_add_stats(struct c2c_stats *stats, struct c2c_stats *add);
91 #endif /* __PERF_MEM_EVENTS_H */