1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Owen Chen <owen.chen@mediatek.com>
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
13 #include <dt-bindings/clock/mt6765-clk.h>
15 static const struct mtk_gate_regs audio0_cg_regs
= {
21 static const struct mtk_gate_regs audio1_cg_regs
= {
27 #define GATE_AUDIO0(_id, _name, _parent, _shift) \
28 GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
30 #define GATE_AUDIO1(_id, _name, _parent, _shift) \
31 GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
33 static const struct mtk_gate audio_clks
[] = {
35 GATE_AUDIO0(CLK_AUDIO_AFE
, "aud_afe", "audio_ck", 2),
36 GATE_AUDIO0(CLK_AUDIO_22M
, "aud_22m", "aud_engen1_ck", 8),
37 GATE_AUDIO0(CLK_AUDIO_APLL_TUNER
, "aud_apll_tuner",
39 GATE_AUDIO0(CLK_AUDIO_ADC
, "aud_adc", "audio_ck", 24),
40 GATE_AUDIO0(CLK_AUDIO_DAC
, "aud_dac", "audio_ck", 25),
41 GATE_AUDIO0(CLK_AUDIO_DAC_PREDIS
, "aud_dac_predis",
43 GATE_AUDIO0(CLK_AUDIO_TML
, "aud_tml", "audio_ck", 27),
45 GATE_AUDIO1(CLK_AUDIO_I2S1_BCLK
, "aud_i2s1_bclk",
47 GATE_AUDIO1(CLK_AUDIO_I2S2_BCLK
, "aud_i2s2_bclk",
49 GATE_AUDIO1(CLK_AUDIO_I2S3_BCLK
, "aud_i2s3_bclk",
51 GATE_AUDIO1(CLK_AUDIO_I2S4_BCLK
, "aud_i2s4_bclk",
55 static const struct mtk_clk_desc audio_desc
= {
57 .num_clks
= ARRAY_SIZE(audio_clks
),
60 static const struct of_device_id of_match_clk_mt6765_audio
[] = {
62 .compatible
= "mediatek,mt6765-audsys",
68 MODULE_DEVICE_TABLE(of
, of_match_clk_mt6765_audio
);
70 static struct platform_driver clk_mt6765_audio_drv
= {
71 .probe
= mtk_clk_simple_probe
,
72 .remove
= mtk_clk_simple_remove
,
74 .name
= "clk-mt6765-audio",
75 .of_match_table
= of_match_clk_mt6765_audio
,
78 module_platform_driver(clk_mt6765_audio_drv
);
80 MODULE_DESCRIPTION("MediaTek MT6765 audio clocks driver");
81 MODULE_LICENSE("GPL");