drivers/clk/mediatek/clk-mt8195-peri_ao.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 //
   3 // Copyright (c) 2021 MediaTek Inc.
   4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
   5
   6 #include "clk-gate.h"
   7 #include "clk-mtk.h"
   8
   9 #include <dt-bindings/clock/mt8195-clk.h>
  10 #include <linux/clk-provider.h>
  11 #include <linux/platform_device.h>
  12
  13 static const struct mtk_gate_regs peri_ao_cg_regs = {
  14         .set_ofs = 0x10,
  15         .clr_ofs = 0x14,
  16         .sta_ofs = 0x18,
  17 };
  18
  19 #define GATE_PERI_AO(_id, _name, _parent, _shift)                       \
  20         GATE_MTK(_id, _name, _parent, &peri_ao_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
  21
  22 static const struct mtk_gate peri_ao_clks[] = {
  23         GATE_PERI_AO(CLK_PERI_AO_ETHERNET, "peri_ao_ethernet", "top_axi", 0),
  24         GATE_PERI_AO(CLK_PERI_AO_ETHERNET_BUS, "peri_ao_ethernet_bus", "top_axi", 1),
  25         GATE_PERI_AO(CLK_PERI_AO_FLASHIF_BUS, "peri_ao_flashif_bus", "top_axi", 3),
  26         GATE_PERI_AO(CLK_PERI_AO_FLASHIF_FLASH, "peri_ao_flashif_flash", "top_spinor", 5),
  27         GATE_PERI_AO(CLK_PERI_AO_SSUSB_1P_BUS, "peri_ao_ssusb_1p_bus", "top_usb_top_1p", 7),
  28         GATE_PERI_AO(CLK_PERI_AO_SSUSB_1P_XHCI, "peri_ao_ssusb_1p_xhci", "top_ssusb_xhci_1p", 8),
  29         GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_BUS, "peri_ao_ssusb_2p_bus", "top_usb_top_2p", 9),
  30         GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_XHCI, "peri_ao_ssusb_2p_xhci", "top_ssusb_xhci_2p", 10),
  31         GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_BUS, "peri_ao_ssusb_3p_bus", "top_usb_top_3p", 11),
  32         GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_XHCI, "peri_ao_ssusb_3p_xhci", "top_ssusb_xhci_3p", 12),
  33         GATE_PERI_AO(CLK_PERI_AO_SPINFI, "peri_ao_spinfi", "top_spinfi_bclk", 15),
  34         GATE_PERI_AO(CLK_PERI_AO_ETHERNET_MAC, "peri_ao_ethernet_mac", "top_snps_eth_250m", 16),
  35         GATE_PERI_AO(CLK_PERI_AO_NFI_H, "peri_ao_nfi_h", "top_axi", 19),
  36         GATE_PERI_AO(CLK_PERI_AO_FNFI1X, "peri_ao_fnfi1x", "top_nfi1x", 20),
  37         GATE_PERI_AO(CLK_PERI_AO_PCIE_P0_MEM, "peri_ao_pcie_p0_mem", "mem_466m", 24),
  38         GATE_PERI_AO(CLK_PERI_AO_PCIE_P1_MEM, "peri_ao_pcie_p1_mem", "mem_466m", 25),
  39 };
  40
  41 static const struct mtk_clk_desc peri_ao_desc = {
  42         .clks = peri_ao_clks,
  43         .num_clks = ARRAY_SIZE(peri_ao_clks),
  44 };
  45
  46 static const struct of_device_id of_match_clk_mt8195_peri_ao[] = {
  47         {
  48                 .compatible = "mediatek,mt8195-pericfg_ao",
  49                 .data = &peri_ao_desc,
  50         }, {
  51                 /* sentinel */
  52         }
  53 };
  54 MODULE_DEVICE_TABLE(of, of_match_clk_mt8195_peri_ao);
  55
  56 static struct platform_driver clk_mt8195_peri_ao_drv = {
  57         .probe = mtk_clk_simple_probe,
  58         .remove = mtk_clk_simple_remove,
  59         .driver = {
  60                 .name = "clk-mt8195-peri_ao",
  61                 .of_match_table = of_match_clk_mt8195_peri_ao,
  62         },
  63 };
  64 module_platform_driver(clk_mt8195_peri_ao_drv);
  65
  66 MODULE_DESCRIPTION("MediaTek MT8195 pericfg clocks driver");
  67 MODULE_LICENSE("GPL");