1 # SPDX-License-Identifier: GPL-2.0
4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
5 default y if ARCH_RENESAS
6 select CLK_EMEV2 if ARCH_EMEV2
7 select CLK_RZA1 if ARCH_R7S72100
8 select CLK_R7S9210 if ARCH_R7S9210
9 select CLK_R8A73A4 if ARCH_R8A73A4
10 select CLK_R8A7740 if ARCH_R8A7740
11 select CLK_R8A7742 if ARCH_R8A7742
12 select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744
13 select CLK_R8A7745 if ARCH_R8A7745
14 select CLK_R8A77470 if ARCH_R8A77470
15 select CLK_R8A774A1 if ARCH_R8A774A1
16 select CLK_R8A774B1 if ARCH_R8A774B1
17 select CLK_R8A774C0 if ARCH_R8A774C0
18 select CLK_R8A774E1 if ARCH_R8A774E1
19 select CLK_R8A7778 if ARCH_R8A7778
20 select CLK_R8A7779 if ARCH_R8A7779
21 select CLK_R8A7790 if ARCH_R8A7790
22 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
23 select CLK_R8A7792 if ARCH_R8A7792
24 select CLK_R8A7794 if ARCH_R8A7794
25 select CLK_R8A7795 if ARCH_R8A77951
26 select CLK_R8A77960 if ARCH_R8A77960
27 select CLK_R8A77961 if ARCH_R8A77961
28 select CLK_R8A77965 if ARCH_R8A77965
29 select CLK_R8A77970 if ARCH_R8A77970
30 select CLK_R8A77980 if ARCH_R8A77980
31 select CLK_R8A77990 if ARCH_R8A77990
32 select CLK_R8A77995 if ARCH_R8A77995
33 select CLK_R8A779A0 if ARCH_R8A779A0
34 select CLK_R8A779F0 if ARCH_R8A779F0
35 select CLK_R8A779G0 if ARCH_R8A779G0
36 select CLK_R8A779H0 if ARCH_R8A779H0
37 select CLK_R9A06G032 if ARCH_R9A06G032
38 select CLK_R9A07G043 if ARCH_R9A07G043
39 select CLK_R9A07G044 if ARCH_R9A07G044
40 select CLK_R9A07G054 if ARCH_R9A07G054
41 select CLK_R9A08G045 if ARCH_R9A08G045
42 select CLK_R9A09G011 if ARCH_R9A09G011
43 select CLK_R9A09G057 if ARCH_R9A09G057
44 select CLK_SH73A0 if ARCH_SH73A0
50 bool "Emma Mobile EV2 clock support" if COMPILE_TEST
53 bool "RZ/A1H clock support" if COMPILE_TEST
54 select CLK_RENESAS_CPG_MSTP
57 bool "RZ/A2 clock support" if COMPILE_TEST
58 select CLK_RENESAS_CPG_MSSR
61 bool "R-Mobile APE6 clock support" if COMPILE_TEST
62 select CLK_RENESAS_CPG_MSTP
63 select CLK_RENESAS_DIV6
66 bool "R-Mobile A1 clock support" if COMPILE_TEST
67 select CLK_RENESAS_CPG_MSTP
68 select CLK_RENESAS_DIV6
71 bool "RZ/G1H clock support" if COMPILE_TEST
72 select CLK_RCAR_GEN2_CPG
75 bool "RZ/G1M clock support" if COMPILE_TEST
76 select CLK_RCAR_GEN2_CPG
79 bool "RZ/G1E clock support" if COMPILE_TEST
80 select CLK_RCAR_GEN2_CPG
83 bool "RZ/G1C clock support" if COMPILE_TEST
84 select CLK_RCAR_GEN2_CPG
87 bool "RZ/G2M clock support" if COMPILE_TEST
88 select CLK_RCAR_GEN3_CPG
91 bool "RZ/G2N clock support" if COMPILE_TEST
92 select CLK_RCAR_GEN3_CPG
95 bool "RZ/G2E clock support" if COMPILE_TEST
96 select CLK_RCAR_GEN3_CPG
99 bool "RZ/G2H clock support" if COMPILE_TEST
100 select CLK_RCAR_GEN3_CPG
103 bool "R-Car M1A clock support" if COMPILE_TEST
104 select CLK_RENESAS_CPG_MSTP
107 bool "R-Car H1 clock support" if COMPILE_TEST
108 select CLK_RENESAS_CPG_MSTP
111 bool "R-Car H2 clock support" if COMPILE_TEST
112 select CLK_RCAR_GEN2_CPG
115 bool "R-Car M2-W/N clock support" if COMPILE_TEST
116 select CLK_RCAR_GEN2_CPG
119 bool "R-Car V2H clock support" if COMPILE_TEST
120 select CLK_RCAR_GEN2_CPG
123 bool "R-Car E2 clock support" if COMPILE_TEST
124 select CLK_RCAR_GEN2_CPG
127 bool "R-Car H3 clock support" if COMPILE_TEST
128 select CLK_RCAR_GEN3_CPG
131 bool "R-Car M3-W clock support" if COMPILE_TEST
132 select CLK_RCAR_GEN3_CPG
135 bool "R-Car M3-W+ clock support" if COMPILE_TEST
136 select CLK_RCAR_GEN3_CPG
139 bool "R-Car M3-N clock support" if COMPILE_TEST
140 select CLK_RCAR_GEN3_CPG
143 bool "R-Car V3M clock support" if COMPILE_TEST
144 select CLK_RCAR_GEN3_CPG
147 bool "R-Car V3H clock support" if COMPILE_TEST
148 select CLK_RCAR_GEN3_CPG
151 bool "R-Car E3 clock support" if COMPILE_TEST
152 select CLK_RCAR_GEN3_CPG
155 bool "R-Car D3 clock support" if COMPILE_TEST
156 select CLK_RCAR_GEN3_CPG
159 bool "R-Car V3U clock support" if COMPILE_TEST
160 select CLK_RCAR_GEN4_CPG
163 bool "R-Car S4-8 clock support" if COMPILE_TEST
164 select CLK_RCAR_GEN4_CPG
167 bool "R-Car V4H clock support" if COMPILE_TEST
168 select CLK_RCAR_GEN4_CPG
171 bool "R-Car V4M clock support" if COMPILE_TEST
172 select CLK_RCAR_GEN4_CPG
175 bool "RZ/N1D clock support" if COMPILE_TEST
178 bool "RZ/G2UL clock support" if COMPILE_TEST
182 bool "RZ/G2L clock support" if COMPILE_TEST
186 bool "RZ/V2L clock support" if COMPILE_TEST
190 bool "RZ/G3S clock support" if COMPILE_TEST
194 bool "RZ/V2M clock support" if COMPILE_TEST
198 bool "RZ/V2H(P) clock support" if COMPILE_TEST
202 bool "SH-Mobile AG5 clock support" if COMPILE_TEST
203 select CLK_RENESAS_CPG_MSTP
204 select CLK_RENESAS_DIV6
208 config CLK_RCAR_CPG_LIB
209 bool "CPG/MSSR library functions" if COMPILE_TEST
211 config CLK_RCAR_GEN2_CPG
212 bool "R-Car Gen2 CPG clock support" if COMPILE_TEST
213 select CLK_RENESAS_CPG_MSSR
215 config CLK_RCAR_GEN3_CPG
216 bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST
217 select CLK_RCAR_CPG_LIB
218 select CLK_RENESAS_CPG_MSSR
220 config CLK_RCAR_GEN4_CPG
221 bool "R-Car Gen4 clock support" if COMPILE_TEST
222 select CLK_RCAR_CPG_LIB
223 select CLK_RENESAS_CPG_MSSR
225 config CLK_RCAR_USB2_CLOCK_SEL
226 bool "R-Car USB2 clock selector support"
227 depends on ARCH_RENESAS || COMPILE_TEST
228 select RESET_CONTROLLER
230 This is a driver for R-Car USB2 clock selector
233 bool "RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST
234 select RESET_CONTROLLER
237 bool "RZ/V2H(P) family clock support" if COMPILE_TEST
238 select RESET_CONTROLLER
241 config CLK_RENESAS_CPG_MSSR
242 bool "CPG/MSSR clock support" if COMPILE_TEST
243 select CLK_RENESAS_DIV6
245 config CLK_RENESAS_CPG_MSTP
246 bool "MSTP clock support" if COMPILE_TEST
248 config CLK_RENESAS_DIV6
249 bool "DIV6 clock support" if COMPILE_TEST