drm/tests: hdmi: Fix memory leaks in drm_display_mode_from_cea_vic()
[drm/drm-misc.git] / drivers / clk / renesas / rcar-usb2-clock-sel.c
blob421ae973ea8e0d5af415cfd164139debf84c1f58
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Renesas R-Car USB2.0 clock selector
5 * Copyright (C) 2017 Renesas Electronics Corp.
7 * Based on renesas-cpg-mssr.c
9 * Copyright (C) 2015 Glider bvba
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 #include <linux/device.h>
15 #include <linux/init.h>
16 #include <linux/io.h>
17 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/pm.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/reset.h>
22 #include <linux/slab.h>
24 #define USB20_CLKSET0 0x00
25 #define CLKSET0_INTCLK_EN BIT(11)
26 #define CLKSET0_PRIVATE BIT(0)
27 #define CLKSET0_EXTAL_ONLY (CLKSET0_INTCLK_EN | CLKSET0_PRIVATE)
29 static const struct clk_bulk_data rcar_usb2_clocks[] = {
30 { .id = "ehci_ohci", },
31 { .id = "hs-usb-if", },
34 struct usb2_clock_sel_priv {
35 void __iomem *base;
36 struct clk_hw hw;
37 struct clk_bulk_data clks[ARRAY_SIZE(rcar_usb2_clocks)];
38 struct reset_control *rsts;
39 bool extal;
40 bool xtal;
42 #define to_priv(_hw) container_of(_hw, struct usb2_clock_sel_priv, hw)
44 static void usb2_clock_sel_enable_extal_only(struct usb2_clock_sel_priv *priv)
46 u16 val = readw(priv->base + USB20_CLKSET0);
48 pr_debug("%s: enter %d %d %x\n", __func__,
49 priv->extal, priv->xtal, val);
51 if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY)
52 writew(CLKSET0_EXTAL_ONLY, priv->base + USB20_CLKSET0);
55 static void usb2_clock_sel_disable_extal_only(struct usb2_clock_sel_priv *priv)
57 if (priv->extal && !priv->xtal)
58 writew(CLKSET0_PRIVATE, priv->base + USB20_CLKSET0);
61 static int usb2_clock_sel_enable(struct clk_hw *hw)
63 struct usb2_clock_sel_priv *priv = to_priv(hw);
64 int ret;
66 ret = reset_control_deassert(priv->rsts);
67 if (ret)
68 return ret;
70 ret = clk_bulk_prepare_enable(ARRAY_SIZE(priv->clks), priv->clks);
71 if (ret) {
72 reset_control_assert(priv->rsts);
73 return ret;
76 usb2_clock_sel_enable_extal_only(priv);
78 return 0;
81 static void usb2_clock_sel_disable(struct clk_hw *hw)
83 struct usb2_clock_sel_priv *priv = to_priv(hw);
85 usb2_clock_sel_disable_extal_only(priv);
87 clk_bulk_disable_unprepare(ARRAY_SIZE(priv->clks), priv->clks);
88 reset_control_assert(priv->rsts);
92 * This module seems a mux, but this driver assumes a gate because
93 * ehci/ohci platform drivers don't support clk_set_parent() for now.
94 * If this driver acts as a gate, ehci/ohci-platform drivers don't need
95 * any modification.
97 static const struct clk_ops usb2_clock_sel_clock_ops = {
98 .enable = usb2_clock_sel_enable,
99 .disable = usb2_clock_sel_disable,
102 static const struct of_device_id rcar_usb2_clock_sel_match[] = {
103 { .compatible = "renesas,rcar-gen3-usb2-clock-sel" },
107 static int rcar_usb2_clock_sel_suspend(struct device *dev)
109 struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);
111 usb2_clock_sel_disable_extal_only(priv);
112 pm_runtime_put(dev);
114 return 0;
117 static int rcar_usb2_clock_sel_resume(struct device *dev)
119 struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);
121 pm_runtime_get_sync(dev);
122 usb2_clock_sel_enable_extal_only(priv);
124 return 0;
127 static void rcar_usb2_clock_sel_remove(struct platform_device *pdev)
129 struct device *dev = &pdev->dev;
131 of_clk_del_provider(dev->of_node);
132 pm_runtime_put(dev);
133 pm_runtime_disable(dev);
136 static int rcar_usb2_clock_sel_probe(struct platform_device *pdev)
138 struct device *dev = &pdev->dev;
139 struct device_node *np = dev->of_node;
140 struct usb2_clock_sel_priv *priv;
141 struct clk *clk;
142 struct clk_init_data init = {};
143 int ret;
145 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
146 if (!priv)
147 return -ENOMEM;
149 priv->base = devm_platform_ioremap_resource(pdev, 0);
150 if (IS_ERR(priv->base))
151 return PTR_ERR(priv->base);
153 memcpy(priv->clks, rcar_usb2_clocks, sizeof(priv->clks));
154 ret = devm_clk_bulk_get(dev, ARRAY_SIZE(priv->clks), priv->clks);
155 if (ret < 0)
156 return ret;
158 priv->rsts = devm_reset_control_array_get_shared(dev);
159 if (IS_ERR(priv->rsts))
160 return PTR_ERR(priv->rsts);
162 clk = devm_clk_get(dev, "usb_extal");
163 if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
164 priv->extal = !!clk_get_rate(clk);
165 clk_disable_unprepare(clk);
167 clk = devm_clk_get(dev, "usb_xtal");
168 if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
169 priv->xtal = !!clk_get_rate(clk);
170 clk_disable_unprepare(clk);
173 if (!priv->extal && !priv->xtal) {
174 dev_err(dev, "This driver needs usb_extal or usb_xtal\n");
175 return -ENOENT;
178 pm_runtime_enable(dev);
179 pm_runtime_get_sync(dev);
180 platform_set_drvdata(pdev, priv);
181 dev_set_drvdata(dev, priv);
183 init.name = "rcar_usb2_clock_sel";
184 init.ops = &usb2_clock_sel_clock_ops;
185 priv->hw.init = &init;
187 ret = devm_clk_hw_register(dev, &priv->hw);
188 if (ret)
189 goto pm_put;
191 ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &priv->hw);
192 if (ret)
193 goto pm_put;
195 return 0;
197 pm_put:
198 pm_runtime_put(dev);
199 pm_runtime_disable(dev);
200 return ret;
203 static const struct dev_pm_ops rcar_usb2_clock_sel_pm_ops = {
204 .suspend = rcar_usb2_clock_sel_suspend,
205 .resume = rcar_usb2_clock_sel_resume,
208 static struct platform_driver rcar_usb2_clock_sel_driver = {
209 .driver = {
210 .name = "rcar-usb2-clock-sel",
211 .of_match_table = rcar_usb2_clock_sel_match,
212 .pm = &rcar_usb2_clock_sel_pm_ops,
214 .probe = rcar_usb2_clock_sel_probe,
215 .remove = rcar_usb2_clock_sel_remove,
217 builtin_platform_driver(rcar_usb2_clock_sel_driver);
219 MODULE_DESCRIPTION("Renesas R-Car USB2 clock selector Driver");
220 MODULE_LICENSE("GPL v2");