drm/tests: hdmi: Fix memory leaks in drm_display_mode_from_cea_vic()
[drm/drm-misc.git] / drivers / clk / sophgo / clk-cv18xx-common.c
blobcbcdd88f0e23fa73663bdeb3680238ba4be1ba87
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
4 */
6 #include <linux/io.h>
7 #include <linux/iopoll.h>
8 #include <linux/spinlock.h>
9 #include <linux/bug.h>
11 #include "clk-cv18xx-common.h"
13 int cv1800_clk_setbit(struct cv1800_clk_common *common,
14 struct cv1800_clk_regbit *field)
16 u32 mask = BIT(field->shift);
17 u32 value;
18 unsigned long flags;
20 spin_lock_irqsave(common->lock, flags);
22 value = readl(common->base + field->reg);
23 writel(value | mask, common->base + field->reg);
25 spin_unlock_irqrestore(common->lock, flags);
27 return 0;
30 int cv1800_clk_clearbit(struct cv1800_clk_common *common,
31 struct cv1800_clk_regbit *field)
33 u32 mask = BIT(field->shift);
34 u32 value;
35 unsigned long flags;
37 spin_lock_irqsave(common->lock, flags);
39 value = readl(common->base + field->reg);
40 writel(value & ~mask, common->base + field->reg);
42 spin_unlock_irqrestore(common->lock, flags);
44 return 0;
47 int cv1800_clk_checkbit(struct cv1800_clk_common *common,
48 struct cv1800_clk_regbit *field)
50 return readl(common->base + field->reg) & BIT(field->shift);
53 #define PLL_LOCK_TIMEOUT_US (200 * 1000)
55 void cv1800_clk_wait_for_lock(struct cv1800_clk_common *common,
56 u32 reg, u32 lock)
58 void __iomem *addr = common->base + reg;
59 u32 regval;
61 if (!lock)
62 return;
64 WARN_ON(readl_relaxed_poll_timeout(addr, regval, regval & lock,
65 100, PLL_LOCK_TIMEOUT_US));