drm/tests: hdmi: Fix memory leaks in drm_display_mode_from_cea_vic()
[drm/drm-misc.git] / drivers / extcon / extcon-intel-cht-wc.c
blob93552dc3c895c6d43a0f916ab7dcc9e97aa27f31
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Extcon charger detection driver for Intel Cherrytrail Whiskey Cove PMIC
4 * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
6 * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
7 * Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
8 */
10 #include <linux/extcon-provider.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/mfd/intel_soc_pmic.h>
14 #include <linux/module.h>
15 #include <linux/mod_devicetable.h>
16 #include <linux/platform_device.h>
17 #include <linux/power_supply.h>
18 #include <linux/property.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/consumer.h>
21 #include <linux/slab.h>
22 #include <linux/usb/role.h>
24 #include "extcon-intel.h"
26 #define CHT_WC_PHYCTRL 0x5e07
28 #define CHT_WC_CHGRCTRL0 0x5e16
29 #define CHT_WC_CHGRCTRL0_CHGRRESET BIT(0)
30 #define CHT_WC_CHGRCTRL0_EMRGCHREN BIT(1)
31 #define CHT_WC_CHGRCTRL0_EXTCHRDIS BIT(2)
32 #define CHT_WC_CHGRCTRL0_SWCONTROL BIT(3)
33 #define CHT_WC_CHGRCTRL0_TTLCK BIT(4)
34 #define CHT_WC_CHGRCTRL0_CCSM_OFF BIT(5)
35 #define CHT_WC_CHGRCTRL0_DBPOFF BIT(6)
36 #define CHT_WC_CHGRCTRL0_CHR_WDT_NOKICK BIT(7)
38 #define CHT_WC_CHGRCTRL1 0x5e17
39 #define CHT_WC_CHGRCTRL1_FUSB_INLMT_100 BIT(0)
40 #define CHT_WC_CHGRCTRL1_FUSB_INLMT_150 BIT(1)
41 #define CHT_WC_CHGRCTRL1_FUSB_INLMT_500 BIT(2)
42 #define CHT_WC_CHGRCTRL1_FUSB_INLMT_900 BIT(3)
43 #define CHT_WC_CHGRCTRL1_FUSB_INLMT_1500 BIT(4)
44 #define CHT_WC_CHGRCTRL1_FTEMP_EVENT BIT(5)
45 #define CHT_WC_CHGRCTRL1_OTGMODE BIT(6)
46 #define CHT_WC_CHGRCTRL1_DBPEN BIT(7)
48 #define CHT_WC_USBSRC 0x5e29
49 #define CHT_WC_USBSRC_STS_MASK GENMASK(1, 0)
50 #define CHT_WC_USBSRC_STS_SUCCESS 2
51 #define CHT_WC_USBSRC_STS_FAIL 3
52 #define CHT_WC_USBSRC_TYPE_SHIFT 2
53 #define CHT_WC_USBSRC_TYPE_MASK GENMASK(5, 2)
54 #define CHT_WC_USBSRC_TYPE_NONE 0
55 #define CHT_WC_USBSRC_TYPE_SDP 1
56 #define CHT_WC_USBSRC_TYPE_DCP 2
57 #define CHT_WC_USBSRC_TYPE_CDP 3
58 #define CHT_WC_USBSRC_TYPE_ACA 4
59 #define CHT_WC_USBSRC_TYPE_SE1 5
60 #define CHT_WC_USBSRC_TYPE_MHL 6
61 #define CHT_WC_USBSRC_TYPE_FLOATING 7
62 #define CHT_WC_USBSRC_TYPE_OTHER 8
63 #define CHT_WC_USBSRC_TYPE_DCP_EXTPHY 9
65 #define CHT_WC_CHGDISCTRL 0x5e2f
66 #define CHT_WC_CHGDISCTRL_OUT BIT(0)
67 /* 0 - open drain, 1 - regular push-pull output */
68 #define CHT_WC_CHGDISCTRL_DRV BIT(4)
69 /* 0 - pin is controlled by SW, 1 - by HW */
70 #define CHT_WC_CHGDISCTRL_FN BIT(6)
72 #define CHT_WC_PWRSRC_IRQ 0x6e03
73 #define CHT_WC_PWRSRC_IRQ_MASK 0x6e0f
74 #define CHT_WC_PWRSRC_STS 0x6e1e
75 #define CHT_WC_PWRSRC_VBUS BIT(0)
76 #define CHT_WC_PWRSRC_DC BIT(1)
77 #define CHT_WC_PWRSRC_BATT BIT(2)
78 #define CHT_WC_PWRSRC_USBID_MASK GENMASK(4, 3)
79 #define CHT_WC_PWRSRC_USBID_SHIFT 3
80 #define CHT_WC_PWRSRC_RID_ACA 0
81 #define CHT_WC_PWRSRC_RID_GND 1
82 #define CHT_WC_PWRSRC_RID_FLOAT 2
84 #define CHT_WC_VBUS_GPIO_CTLO 0x6e2d
85 #define CHT_WC_VBUS_GPIO_CTLO_OUTPUT BIT(0)
86 #define CHT_WC_VBUS_GPIO_CTLO_DRV_OD BIT(4)
87 #define CHT_WC_VBUS_GPIO_CTLO_DIR_OUT BIT(5)
89 enum cht_wc_mux_select {
90 MUX_SEL_PMIC = 0,
91 MUX_SEL_SOC,
94 static const unsigned int cht_wc_extcon_cables[] = {
95 EXTCON_USB,
96 EXTCON_USB_HOST,
97 EXTCON_CHG_USB_SDP,
98 EXTCON_CHG_USB_CDP,
99 EXTCON_CHG_USB_DCP,
100 EXTCON_CHG_USB_ACA,
101 EXTCON_NONE,
104 struct cht_wc_extcon_data {
105 struct device *dev;
106 struct regmap *regmap;
107 struct extcon_dev *edev;
108 struct usb_role_switch *role_sw;
109 struct regulator *vbus_boost;
110 struct power_supply *psy;
111 enum power_supply_usb_type usb_type;
112 unsigned int previous_cable;
113 bool usb_host;
114 bool vbus_boost_enabled;
117 static int cht_wc_extcon_get_id(struct cht_wc_extcon_data *ext, int pwrsrc_sts)
119 switch ((pwrsrc_sts & CHT_WC_PWRSRC_USBID_MASK) >> CHT_WC_PWRSRC_USBID_SHIFT) {
120 case CHT_WC_PWRSRC_RID_GND:
121 return INTEL_USB_ID_GND;
122 case CHT_WC_PWRSRC_RID_FLOAT:
123 return INTEL_USB_ID_FLOAT;
125 * According to the spec. we should read the USB-ID pin ADC value here
126 * to determine the resistance of the used pull-down resister and then
127 * return RID_A / RID_B / RID_C based on this. But all "Accessory
128 * Charger Adapter"s (ACAs) which users can actually buy always use
129 * a combination of a charging port with one or more USB-A ports, so
130 * they should always use a resistor indicating RID_A. But the spec
131 * is hard to read / badly-worded so some of them actually indicate
132 * they are a RID_B ACA evnen though they clearly are a RID_A ACA.
133 * To workaround this simply always return INTEL_USB_RID_A, which
134 * matches all the ACAs which users can actually buy.
136 case CHT_WC_PWRSRC_RID_ACA:
137 return INTEL_USB_RID_A;
138 default:
139 return INTEL_USB_ID_FLOAT;
143 static int cht_wc_extcon_get_charger(struct cht_wc_extcon_data *ext,
144 bool ignore_errors)
146 int ret, usbsrc, status;
147 unsigned long timeout;
149 /* Charger detection can take upto 600ms, wait 800ms max. */
150 timeout = jiffies + msecs_to_jiffies(800);
151 do {
152 ret = regmap_read(ext->regmap, CHT_WC_USBSRC, &usbsrc);
153 if (ret) {
154 dev_err(ext->dev, "Error reading usbsrc: %d\n", ret);
155 return ret;
158 status = usbsrc & CHT_WC_USBSRC_STS_MASK;
159 if (status == CHT_WC_USBSRC_STS_SUCCESS ||
160 status == CHT_WC_USBSRC_STS_FAIL)
161 break;
163 msleep(50); /* Wait a bit before retrying */
164 } while (time_before(jiffies, timeout));
166 if (status != CHT_WC_USBSRC_STS_SUCCESS) {
167 if (!ignore_errors) {
168 if (status == CHT_WC_USBSRC_STS_FAIL)
169 dev_warn(ext->dev, "Could not detect charger type\n");
170 else
171 dev_warn(ext->dev, "Timeout detecting charger type\n");
174 /* Safe fallback */
175 usbsrc = CHT_WC_USBSRC_TYPE_SDP << CHT_WC_USBSRC_TYPE_SHIFT;
178 usbsrc = (usbsrc & CHT_WC_USBSRC_TYPE_MASK) >> CHT_WC_USBSRC_TYPE_SHIFT;
179 switch (usbsrc) {
180 default:
181 dev_warn(ext->dev,
182 "Unhandled charger type %d, defaulting to SDP\n",
183 ret);
184 ext->usb_type = POWER_SUPPLY_USB_TYPE_SDP;
185 return EXTCON_CHG_USB_SDP;
186 case CHT_WC_USBSRC_TYPE_SDP:
187 case CHT_WC_USBSRC_TYPE_FLOATING:
188 case CHT_WC_USBSRC_TYPE_OTHER:
189 ext->usb_type = POWER_SUPPLY_USB_TYPE_SDP;
190 return EXTCON_CHG_USB_SDP;
191 case CHT_WC_USBSRC_TYPE_CDP:
192 ext->usb_type = POWER_SUPPLY_USB_TYPE_CDP;
193 return EXTCON_CHG_USB_CDP;
194 case CHT_WC_USBSRC_TYPE_DCP:
195 case CHT_WC_USBSRC_TYPE_DCP_EXTPHY:
196 case CHT_WC_USBSRC_TYPE_MHL: /* MHL2+ delivers upto 2A, treat as DCP */
197 ext->usb_type = POWER_SUPPLY_USB_TYPE_DCP;
198 return EXTCON_CHG_USB_DCP;
199 case CHT_WC_USBSRC_TYPE_ACA:
200 ext->usb_type = POWER_SUPPLY_USB_TYPE_ACA;
201 return EXTCON_CHG_USB_ACA;
205 static void cht_wc_extcon_set_phymux(struct cht_wc_extcon_data *ext, u8 state)
207 int ret;
209 ret = regmap_write(ext->regmap, CHT_WC_PHYCTRL, state);
210 if (ret)
211 dev_err(ext->dev, "Error writing phyctrl: %d\n", ret);
214 static void cht_wc_extcon_set_5v_boost(struct cht_wc_extcon_data *ext,
215 bool enable)
217 int ret, val;
220 * The 5V boost converter is enabled through a gpio on the PMIC, since
221 * there currently is no gpio driver we access the gpio reg directly.
223 val = CHT_WC_VBUS_GPIO_CTLO_DRV_OD | CHT_WC_VBUS_GPIO_CTLO_DIR_OUT;
224 if (enable)
225 val |= CHT_WC_VBUS_GPIO_CTLO_OUTPUT;
227 ret = regmap_write(ext->regmap, CHT_WC_VBUS_GPIO_CTLO, val);
228 if (ret)
229 dev_err(ext->dev, "Error writing Vbus GPIO CTLO: %d\n", ret);
232 static void cht_wc_extcon_set_otgmode(struct cht_wc_extcon_data *ext,
233 bool enable)
235 unsigned int val = enable ? CHT_WC_CHGRCTRL1_OTGMODE : 0;
236 int ret;
238 ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL1,
239 CHT_WC_CHGRCTRL1_OTGMODE, val);
240 if (ret)
241 dev_err(ext->dev, "Error updating CHGRCTRL1 reg: %d\n", ret);
243 if (ext->vbus_boost && ext->vbus_boost_enabled != enable) {
244 if (enable)
245 ret = regulator_enable(ext->vbus_boost);
246 else
247 ret = regulator_disable(ext->vbus_boost);
249 if (ret)
250 dev_err(ext->dev, "Error updating Vbus boost regulator: %d\n", ret);
251 else
252 ext->vbus_boost_enabled = enable;
256 static void cht_wc_extcon_enable_charging(struct cht_wc_extcon_data *ext,
257 bool enable)
259 unsigned int val = enable ? 0 : CHT_WC_CHGDISCTRL_OUT;
260 int ret;
262 ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
263 CHT_WC_CHGDISCTRL_OUT, val);
264 if (ret)
265 dev_err(ext->dev, "Error updating CHGDISCTRL reg: %d\n", ret);
268 /* Small helper to sync EXTCON_CHG_USB_SDP and EXTCON_USB state */
269 static void cht_wc_extcon_set_state(struct cht_wc_extcon_data *ext,
270 unsigned int cable, bool state)
272 extcon_set_state_sync(ext->edev, cable, state);
273 if (cable == EXTCON_CHG_USB_SDP)
274 extcon_set_state_sync(ext->edev, EXTCON_USB, state);
277 static void cht_wc_extcon_pwrsrc_event(struct cht_wc_extcon_data *ext)
279 int ret, pwrsrc_sts, id;
280 unsigned int cable = EXTCON_NONE;
281 /* Ignore errors in host mode, as the 5v boost converter is on then */
282 bool ignore_get_charger_errors = ext->usb_host;
283 enum usb_role role;
285 ext->usb_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
287 ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_STS, &pwrsrc_sts);
288 if (ret) {
289 dev_err(ext->dev, "Error reading pwrsrc status: %d\n", ret);
290 return;
293 id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
294 if (id == INTEL_USB_ID_GND) {
295 cht_wc_extcon_enable_charging(ext, false);
296 cht_wc_extcon_set_otgmode(ext, true);
298 /* The 5v boost causes a false VBUS / SDP detect, skip */
299 goto charger_det_done;
302 cht_wc_extcon_set_otgmode(ext, false);
303 cht_wc_extcon_enable_charging(ext, true);
305 /* Plugged into a host/charger or not connected? */
306 if (!(pwrsrc_sts & CHT_WC_PWRSRC_VBUS)) {
307 /* Route D+ and D- to PMIC for future charger detection */
308 cht_wc_extcon_set_phymux(ext, MUX_SEL_PMIC);
309 goto set_state;
312 ret = cht_wc_extcon_get_charger(ext, ignore_get_charger_errors);
313 if (ret >= 0)
314 cable = ret;
316 charger_det_done:
317 /* Route D+ and D- to SoC for the host or gadget controller */
318 cht_wc_extcon_set_phymux(ext, MUX_SEL_SOC);
320 set_state:
321 if (cable != ext->previous_cable) {
322 cht_wc_extcon_set_state(ext, cable, true);
323 cht_wc_extcon_set_state(ext, ext->previous_cable, false);
324 ext->previous_cable = cable;
327 ext->usb_host = ((id == INTEL_USB_ID_GND) || (id == INTEL_USB_RID_A));
328 extcon_set_state_sync(ext->edev, EXTCON_USB_HOST, ext->usb_host);
330 if (ext->usb_host)
331 role = USB_ROLE_HOST;
332 else if (pwrsrc_sts & CHT_WC_PWRSRC_VBUS)
333 role = USB_ROLE_DEVICE;
334 else
335 role = USB_ROLE_NONE;
337 /* Note: this is a no-op when ext->role_sw is NULL */
338 ret = usb_role_switch_set_role(ext->role_sw, role);
339 if (ret)
340 dev_err(ext->dev, "Error setting USB-role: %d\n", ret);
342 if (ext->psy)
343 power_supply_changed(ext->psy);
346 static irqreturn_t cht_wc_extcon_isr(int irq, void *data)
348 struct cht_wc_extcon_data *ext = data;
349 int ret, irqs;
351 ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_IRQ, &irqs);
352 if (ret) {
353 dev_err(ext->dev, "Error reading irqs: %d\n", ret);
354 return IRQ_NONE;
357 cht_wc_extcon_pwrsrc_event(ext);
359 ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ, irqs);
360 if (ret) {
361 dev_err(ext->dev, "Error writing irqs: %d\n", ret);
362 return IRQ_NONE;
365 return IRQ_HANDLED;
368 static int cht_wc_extcon_sw_control(struct cht_wc_extcon_data *ext, bool enable)
370 int ret, mask, val;
372 val = enable ? 0 : CHT_WC_CHGDISCTRL_FN;
373 ret = regmap_update_bits(ext->regmap, CHT_WC_CHGDISCTRL,
374 CHT_WC_CHGDISCTRL_FN, val);
375 if (ret)
376 dev_err(ext->dev,
377 "Error setting sw control for CHGDIS pin: %d\n",
378 ret);
380 mask = CHT_WC_CHGRCTRL0_SWCONTROL | CHT_WC_CHGRCTRL0_CCSM_OFF;
381 val = enable ? mask : 0;
382 ret = regmap_update_bits(ext->regmap, CHT_WC_CHGRCTRL0, mask, val);
383 if (ret)
384 dev_err(ext->dev, "Error setting sw control: %d\n", ret);
386 return ret;
389 static int cht_wc_extcon_find_role_sw(struct cht_wc_extcon_data *ext)
391 const struct software_node *swnode;
392 struct fwnode_handle *fwnode;
394 swnode = software_node_find_by_name(NULL, "intel-xhci-usb-sw");
395 if (!swnode)
396 return -EPROBE_DEFER;
398 fwnode = software_node_fwnode(swnode);
399 ext->role_sw = usb_role_switch_find_by_fwnode(fwnode);
400 fwnode_handle_put(fwnode);
402 return ext->role_sw ? 0 : -EPROBE_DEFER;
405 static void cht_wc_extcon_put_role_sw(void *data)
407 struct cht_wc_extcon_data *ext = data;
409 usb_role_switch_put(ext->role_sw);
412 /* Some boards require controlling the role-sw and Vbus based on the id-pin */
413 static int cht_wc_extcon_get_role_sw_and_regulator(struct cht_wc_extcon_data *ext)
415 int ret;
417 ret = cht_wc_extcon_find_role_sw(ext);
418 if (ret)
419 return ret;
421 ret = devm_add_action_or_reset(ext->dev, cht_wc_extcon_put_role_sw, ext);
422 if (ret)
423 return ret;
426 * On x86/ACPI platforms the regulator <-> consumer link is provided
427 * by platform_data passed to the regulator driver. This means that
428 * this info is not available before the regulator driver has bound.
429 * Use devm_regulator_get_optional() to avoid getting a dummy
430 * regulator and wait for the regulator to show up if necessary.
432 ext->vbus_boost = devm_regulator_get_optional(ext->dev, "vbus");
433 if (IS_ERR(ext->vbus_boost)) {
434 ret = PTR_ERR(ext->vbus_boost);
435 if (ret == -ENODEV)
436 ret = -EPROBE_DEFER;
438 return dev_err_probe(ext->dev, ret, "getting Vbus regulator");
441 return 0;
444 static int cht_wc_extcon_psy_get_prop(struct power_supply *psy,
445 enum power_supply_property psp,
446 union power_supply_propval *val)
448 struct cht_wc_extcon_data *ext = power_supply_get_drvdata(psy);
450 switch (psp) {
451 case POWER_SUPPLY_PROP_USB_TYPE:
452 val->intval = ext->usb_type;
453 break;
454 case POWER_SUPPLY_PROP_ONLINE:
455 val->intval = ext->usb_type ? 1 : 0;
456 break;
457 default:
458 return -EINVAL;
461 return 0;
464 static const enum power_supply_property cht_wc_extcon_psy_props[] = {
465 POWER_SUPPLY_PROP_USB_TYPE,
466 POWER_SUPPLY_PROP_ONLINE,
469 static const struct power_supply_desc cht_wc_extcon_psy_desc = {
470 .name = "cht_wcove_pwrsrc",
471 .type = POWER_SUPPLY_TYPE_USB,
472 .usb_types = BIT(POWER_SUPPLY_USB_TYPE_SDP) |
473 BIT(POWER_SUPPLY_USB_TYPE_CDP) |
474 BIT(POWER_SUPPLY_USB_TYPE_DCP) |
475 BIT(POWER_SUPPLY_USB_TYPE_ACA) |
476 BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN),
477 .properties = cht_wc_extcon_psy_props,
478 .num_properties = ARRAY_SIZE(cht_wc_extcon_psy_props),
479 .get_property = cht_wc_extcon_psy_get_prop,
482 static int cht_wc_extcon_register_psy(struct cht_wc_extcon_data *ext)
484 struct power_supply_config psy_cfg = { .drv_data = ext };
486 ext->psy = devm_power_supply_register(ext->dev,
487 &cht_wc_extcon_psy_desc,
488 &psy_cfg);
489 return PTR_ERR_OR_ZERO(ext->psy);
492 static int cht_wc_extcon_probe(struct platform_device *pdev)
494 struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
495 struct cht_wc_extcon_data *ext;
496 unsigned long mask = ~(CHT_WC_PWRSRC_VBUS | CHT_WC_PWRSRC_USBID_MASK);
497 int pwrsrc_sts, id;
498 int irq, ret;
500 irq = platform_get_irq(pdev, 0);
501 if (irq < 0)
502 return irq;
504 ext = devm_kzalloc(&pdev->dev, sizeof(*ext), GFP_KERNEL);
505 if (!ext)
506 return -ENOMEM;
508 ext->dev = &pdev->dev;
509 ext->regmap = pmic->regmap;
510 ext->previous_cable = EXTCON_NONE;
512 /* Initialize extcon device */
513 ext->edev = devm_extcon_dev_allocate(ext->dev, cht_wc_extcon_cables);
514 if (IS_ERR(ext->edev))
515 return PTR_ERR(ext->edev);
517 switch (pmic->cht_wc_model) {
518 case INTEL_CHT_WC_GPD_WIN_POCKET:
520 * When a host-cable is detected the BIOS enables an external 5v boost
521 * converter to power connected devices there are 2 problems with this:
522 * 1) This gets seen by the external battery charger as a valid Vbus
523 * supply and it then tries to feed Vsys from this creating a
524 * feedback loop which causes aprox. 300 mA extra battery drain
525 * (and unless we drive the external-charger-disable pin high it
526 * also tries to charge the battery causing even more feedback).
527 * 2) This gets seen by the pwrsrc block as a SDP USB Vbus supply
528 * Since the external battery charger has its own 5v boost converter
529 * which does not have these issues, we simply turn the separate
530 * external 5v boost converter off and leave it off entirely.
532 cht_wc_extcon_set_5v_boost(ext, false);
533 break;
534 case INTEL_CHT_WC_LENOVO_YOGABOOK1:
535 case INTEL_CHT_WC_LENOVO_YT3_X90:
536 /* Do this first, as it may very well return -EPROBE_DEFER. */
537 ret = cht_wc_extcon_get_role_sw_and_regulator(ext);
538 if (ret)
539 return ret;
541 * The bq25890 used here relies on this driver's BC-1.2 charger
542 * detection, and the bq25890 driver expect this info to be
543 * available through a parent power_supply class device which
544 * models the detected charger (idem to how the Type-C TCPM code
545 * registers a power_supply classdev for the connected charger).
547 ret = cht_wc_extcon_register_psy(ext);
548 if (ret)
549 return ret;
550 break;
551 case INTEL_CHT_WC_XIAOMI_MIPAD2:
552 ret = cht_wc_extcon_get_role_sw_and_regulator(ext);
553 if (ret)
554 return ret;
555 break;
556 default:
557 break;
560 /* Enable sw control */
561 ret = cht_wc_extcon_sw_control(ext, true);
562 if (ret)
563 goto disable_sw_control;
565 /* Disable charging by external battery charger */
566 cht_wc_extcon_enable_charging(ext, false);
568 /* Register extcon device */
569 ret = devm_extcon_dev_register(ext->dev, ext->edev);
570 if (ret) {
571 dev_err(ext->dev, "Error registering extcon device: %d\n", ret);
572 goto disable_sw_control;
575 ret = regmap_read(ext->regmap, CHT_WC_PWRSRC_STS, &pwrsrc_sts);
576 if (ret) {
577 dev_err(ext->dev, "Error reading pwrsrc status: %d\n", ret);
578 goto disable_sw_control;
582 * If no USB host or device connected, route D+ and D- to PMIC for
583 * initial charger detection
585 id = cht_wc_extcon_get_id(ext, pwrsrc_sts);
586 if (id != INTEL_USB_ID_GND)
587 cht_wc_extcon_set_phymux(ext, MUX_SEL_PMIC);
589 /* Get initial state */
590 cht_wc_extcon_pwrsrc_event(ext);
592 ret = devm_request_threaded_irq(ext->dev, irq, NULL, cht_wc_extcon_isr,
593 IRQF_ONESHOT, pdev->name, ext);
594 if (ret) {
595 dev_err(ext->dev, "Error requesting interrupt: %d\n", ret);
596 goto disable_sw_control;
599 /* Unmask irqs */
600 ret = regmap_write(ext->regmap, CHT_WC_PWRSRC_IRQ_MASK, mask);
601 if (ret) {
602 dev_err(ext->dev, "Error writing irq-mask: %d\n", ret);
603 goto disable_sw_control;
606 platform_set_drvdata(pdev, ext);
608 return 0;
610 disable_sw_control:
611 cht_wc_extcon_sw_control(ext, false);
612 return ret;
615 static void cht_wc_extcon_remove(struct platform_device *pdev)
617 struct cht_wc_extcon_data *ext = platform_get_drvdata(pdev);
619 cht_wc_extcon_sw_control(ext, false);
622 static const struct platform_device_id cht_wc_extcon_table[] = {
623 { .name = "cht_wcove_pwrsrc" },
626 MODULE_DEVICE_TABLE(platform, cht_wc_extcon_table);
628 static struct platform_driver cht_wc_extcon_driver = {
629 .probe = cht_wc_extcon_probe,
630 .remove_new = cht_wc_extcon_remove,
631 .id_table = cht_wc_extcon_table,
632 .driver = {
633 .name = "cht_wcove_pwrsrc",
636 module_platform_driver(cht_wc_extcon_driver);
638 MODULE_DESCRIPTION("Intel Cherrytrail Whiskey Cove PMIC extcon driver");
639 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
640 MODULE_LICENSE("GPL v2");