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drm/tests: hdmi: Fix memory leaks in drm_display_mode_from_cea_vic()
[drm/drm-misc.git] / drivers / iio / accel / bma180.c
blob2445a0f7bc2baee2a27ee3ec0364ccadb768ea1f
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * bma180.c - IIO driver for Bosch BMA180 triaxial acceleration sensor
4 *
5 * Copyright 2013 Oleksandr Kravchenko <x0199363@ti.com>
6 *
7 * Support for BMA250 (c) Peter Meerwald <pmeerw@pmeerw.net>
8 *
9 * SPI is not supported by driver
10 * BMA023/BMA150/SMB380: 7-bit I2C slave address 0x38
11 * BMA180: 7-bit I2C slave address 0x40 or 0x41
12 * BMA250: 7-bit I2C slave address 0x18 or 0x19
13 */
14
15 #include <linux/module.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/delay.h>
20 #include <linux/bitops.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/iio/iio.h>
25 #include <linux/iio/sysfs.h>
26 #include <linux/iio/buffer.h>
27 #include <linux/iio/trigger.h>
28 #include <linux/iio/trigger_consumer.h>
29 #include <linux/iio/triggered_buffer.h>
30
31 #define BMA180_DRV_NAME "bma180"
32 #define BMA180_IRQ_NAME "bma180_event"
33
34 enum chip_ids {
35 BMA023,
36 BMA150,
37 BMA180,
38 BMA250,
39 };
40
41 struct bma180_data;
42
43 struct bma180_part_info {
44 u8 chip_id;
45 const struct iio_chan_spec *channels;
46 unsigned int num_channels;
47 const int *scale_table;
48 unsigned int num_scales;
49 const int *bw_table;
50 unsigned int num_bw;
51 int temp_offset;
52
53 u8 int_reset_reg, int_reset_mask;
54 u8 sleep_reg, sleep_mask;
55 u8 bw_reg, bw_mask, bw_offset;
56 u8 scale_reg, scale_mask;
57 u8 power_reg, power_mask, lowpower_val;
58 u8 int_enable_reg, int_enable_mask;
59 u8 softreset_reg, softreset_val;
60
61 int (*chip_config)(struct bma180_data *data);
62 void (*chip_disable)(struct bma180_data *data);
63 };
64
65 /* Register set */
66 #define BMA023_CTRL_REG0 0x0a
67 #define BMA023_CTRL_REG1 0x0b
68 #define BMA023_CTRL_REG2 0x14
69 #define BMA023_CTRL_REG3 0x15
70
71 #define BMA023_RANGE_MASK GENMASK(4, 3) /* Range of accel values */
72 #define BMA023_BW_MASK GENMASK(2, 0) /* Accel bandwidth */
73 #define BMA023_SLEEP BIT(0)
74 #define BMA023_INT_RESET_MASK BIT(6)
75 #define BMA023_NEW_DATA_INT BIT(5) /* Intr every new accel data is ready */
76 #define BMA023_RESET_VAL BIT(1)
77
78 #define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */
79 #define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */
80 #define BMA180_TEMP 0x08
81 #define BMA180_CTRL_REG0 0x0d
82 #define BMA180_RESET 0x10
83 #define BMA180_BW_TCS 0x20
84 #define BMA180_CTRL_REG3 0x21
85 #define BMA180_TCO_Z 0x30
86 #define BMA180_OFFSET_LSB1 0x35
87
88 /* BMA180_CTRL_REG0 bits */
89 #define BMA180_DIS_WAKE_UP BIT(0) /* Disable wake up mode */
90 #define BMA180_SLEEP BIT(1) /* 1 - chip will sleep */
91 #define BMA180_EE_W BIT(4) /* Unlock writing to addr from 0x20 */
92 #define BMA180_RESET_INT BIT(6) /* Reset pending interrupts */
93
94 /* BMA180_CTRL_REG3 bits */
95 #define BMA180_NEW_DATA_INT BIT(1) /* Intr every new accel data is ready */
96
97 /* BMA180_OFFSET_LSB1 skipping mode bit */
98 #define BMA180_SMP_SKIP BIT(0)
99
100 /* Bit masks for registers bit fields */
101 #define BMA180_RANGE 0x0e /* Range of measured accel values */
102 #define BMA180_BW 0xf0 /* Accel bandwidth */
103 #define BMA180_MODE_CONFIG 0x03 /* Config operation modes */
104
105 /* We have to write this value in reset register to do soft reset */
106 #define BMA180_RESET_VAL 0xb6
107
108 #define BMA023_ID_REG_VAL 0x02
109 #define BMA180_ID_REG_VAL 0x03
110 #define BMA250_ID_REG_VAL 0x03
111
112 /* Chip power modes */
113 #define BMA180_LOW_POWER 0x03
114
115 #define BMA250_RANGE_REG 0x0f
116 #define BMA250_BW_REG 0x10
117 #define BMA250_POWER_REG 0x11
118 #define BMA250_RESET_REG 0x14
119 #define BMA250_INT_ENABLE_REG 0x17
120 #define BMA250_INT_MAP_REG 0x1a
121 #define BMA250_INT_RESET_REG 0x21
122
123 #define BMA250_RANGE_MASK GENMASK(3, 0) /* Range of accel values */
124 #define BMA250_BW_MASK GENMASK(4, 0) /* Accel bandwidth */
125 #define BMA250_BW_OFFSET 8
126 #define BMA250_SUSPEND_MASK BIT(7) /* chip will sleep */
127 #define BMA250_LOWPOWER_MASK BIT(6)
128 #define BMA250_DATA_INTEN_MASK BIT(4)
129 #define BMA250_INT1_DATA_MASK BIT(0)
130 #define BMA250_INT_RESET_MASK BIT(7) /* Reset pending interrupts */
131
132 struct bma180_data {
133 struct regulator *vdd_supply;
134 struct regulator *vddio_supply;
135 struct i2c_client *client;
136 struct iio_trigger *trig;
137 const struct bma180_part_info *part_info;
138 struct iio_mount_matrix orientation;
139 struct mutex mutex;
140 bool sleep_state;
141 int scale;
142 int bw;
143 bool pmode;
144 /* Ensure timestamp is naturally aligned */
145 struct {
146 s16 chan[4];
147 s64 timestamp __aligned(8);
148 } scan;
149 };
150
151 enum bma180_chan {
152 AXIS_X,
153 AXIS_Y,
154 AXIS_Z,
155 TEMP
156 };
157
158 static int bma023_bw_table[] = { 25, 50, 100, 190, 375, 750, 1500 }; /* Hz */
159 static int bma023_scale_table[] = { 2452, 4903, 9709, };
160
161 static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */
162 static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
163
164 static int bma250_bw_table[] = { 8, 16, 31, 63, 125, 250, 500, 1000 }; /* Hz */
165 static int bma250_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0,
166 0, 0, 306458 };
167
168 static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan)
169 {
170 int ret;
171
172 if (data->sleep_state)
173 return -EBUSY;
174
175 switch (chan) {
176 case TEMP:
177 ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP);
178 if (ret < 0)
179 dev_err(&data->client->dev, "failed to read temp register\n");
180 break;
181 default:
182 ret = i2c_smbus_read_word_data(data->client,
183 BMA180_ACC_X_LSB + chan * 2);
184 if (ret < 0)
185 dev_err(&data->client->dev,
186 "failed to read accel_%c register\n",
187 'x' + chan);
188 }
189
190 return ret;
191 }
192
193 static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val)
194 {
195 int ret = i2c_smbus_read_byte_data(data->client, reg);
196 u8 reg_val = (ret & ~mask) | (val << (ffs(mask) - 1));
197
198 if (ret < 0)
199 return ret;
200
201 return i2c_smbus_write_byte_data(data->client, reg, reg_val);
202 }
203
204 static int bma180_reset_intr(struct bma180_data *data)
205 {
206 int ret = bma180_set_bits(data, data->part_info->int_reset_reg,
207 data->part_info->int_reset_mask, 1);
208
209 if (ret)
210 dev_err(&data->client->dev, "failed to reset interrupt\n");
211
212 return ret;
213 }
214
215 static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state)
216 {
217 int ret = bma180_set_bits(data, data->part_info->int_enable_reg,
218 data->part_info->int_enable_mask, state);
219 if (ret)
220 goto err;
221 ret = bma180_reset_intr(data);
222 if (ret)
223 goto err;
224
225 return 0;
226
227 err:
228 dev_err(&data->client->dev,
229 "failed to set new data interrupt state %d\n", state);
230 return ret;
231 }
232
233 static int bma180_set_sleep_state(struct bma180_data *data, bool state)
234 {
235 int ret = bma180_set_bits(data, data->part_info->sleep_reg,
236 data->part_info->sleep_mask, state);
237
238 if (ret) {
239 dev_err(&data->client->dev,
240 "failed to set sleep state %d\n", state);
241 return ret;
242 }
243 data->sleep_state = state;
244
245 return 0;
246 }
247
248 static int bma180_set_ee_writing_state(struct bma180_data *data, bool state)
249 {
250 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state);
251
252 if (ret)
253 dev_err(&data->client->dev,
254 "failed to set ee writing state %d\n", state);
255
256 return ret;
257 }
258
259 static int bma180_set_bw(struct bma180_data *data, int val)
260 {
261 int ret, i;
262
263 if (data->sleep_state)
264 return -EBUSY;
265
266 for (i = 0; i < data->part_info->num_bw; ++i) {
267 if (data->part_info->bw_table[i] == val) {
268 ret = bma180_set_bits(data, data->part_info->bw_reg,
269 data->part_info->bw_mask,
270 i + data->part_info->bw_offset);
271 if (ret) {
272 dev_err(&data->client->dev,
273 "failed to set bandwidth\n");
274 return ret;
275 }
276 data->bw = val;
277 return 0;
278 }
279 }
280
281 return -EINVAL;
282 }
283
284 static int bma180_set_scale(struct bma180_data *data, int val)
285 {
286 int ret, i;
287
288 if (data->sleep_state)
289 return -EBUSY;
290
291 for (i = 0; i < data->part_info->num_scales; ++i)
292 if (data->part_info->scale_table[i] == val) {
293 ret = bma180_set_bits(data, data->part_info->scale_reg,
294 data->part_info->scale_mask, i);
295 if (ret) {
296 dev_err(&data->client->dev,
297 "failed to set scale\n");
298 return ret;
299 }
300 data->scale = val;
301 return 0;
302 }
303
304 return -EINVAL;
305 }
306
307 static int bma180_set_pmode(struct bma180_data *data, bool mode)
308 {
309 u8 reg_val = mode ? data->part_info->lowpower_val : 0;
310 int ret = bma180_set_bits(data, data->part_info->power_reg,
311 data->part_info->power_mask, reg_val);
312
313 if (ret) {
314 dev_err(&data->client->dev, "failed to set power mode\n");
315 return ret;
316 }
317 data->pmode = mode;
318
319 return 0;
320 }
321
322 static int bma180_soft_reset(struct bma180_data *data)
323 {
324 int ret = i2c_smbus_write_byte_data(data->client,
325 data->part_info->softreset_reg,
326 data->part_info->softreset_val);
327
328 if (ret)
329 dev_err(&data->client->dev, "failed to reset the chip\n");
330
331 return ret;
332 }
333
334 static int bma180_chip_init(struct bma180_data *data)
335 {
336 /* Try to read chip_id register. It must return 0x03. */
337 int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID);
338
339 if (ret < 0)
340 return ret;
341 if (ret != data->part_info->chip_id) {
342 dev_err(&data->client->dev, "wrong chip ID %d expected %d\n",
343 ret, data->part_info->chip_id);
344 return -ENODEV;
345 }
346
347 ret = bma180_soft_reset(data);
348 if (ret)
349 return ret;
350 /*
351 * No serial transaction should occur within minimum 10 us
352 * after soft_reset command
353 */
354 msleep(20);
355
356 return bma180_set_new_data_intr_state(data, false);
357 }
358
359 static int bma023_chip_config(struct bma180_data *data)
360 {
361 int ret = bma180_chip_init(data);
362
363 if (ret)
364 goto err;
365
366 ret = bma180_set_bw(data, 50); /* 50 Hz */
367 if (ret)
368 goto err;
369 ret = bma180_set_scale(data, 2452); /* 2 G */
370 if (ret)
371 goto err;
372
373 return 0;
374
375 err:
376 dev_err(&data->client->dev, "failed to config the chip\n");
377 return ret;
378 }
379
380 static int bma180_chip_config(struct bma180_data *data)
381 {
382 int ret = bma180_chip_init(data);
383
384 if (ret)
385 goto err;
386 ret = bma180_set_pmode(data, false);
387 if (ret)
388 goto err;
389 ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1);
390 if (ret)
391 goto err;
392 ret = bma180_set_ee_writing_state(data, true);
393 if (ret)
394 goto err;
395 ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1);
396 if (ret)
397 goto err;
398 ret = bma180_set_bw(data, 20); /* 20 Hz */
399 if (ret)
400 goto err;
401 ret = bma180_set_scale(data, 2452); /* 2 G */
402 if (ret)
403 goto err;
404
405 return 0;
406
407 err:
408 dev_err(&data->client->dev, "failed to config the chip\n");
409 return ret;
410 }
411
412 static int bma250_chip_config(struct bma180_data *data)
413 {
414 int ret = bma180_chip_init(data);
415
416 if (ret)
417 goto err;
418 ret = bma180_set_pmode(data, false);
419 if (ret)
420 goto err;
421 ret = bma180_set_bw(data, 16); /* 16 Hz */
422 if (ret)
423 goto err;
424 ret = bma180_set_scale(data, 38344); /* 2 G */
425 if (ret)
426 goto err;
427 /*
428 * This enables dataready interrupt on the INT1 pin
429 * FIXME: support using the INT2 pin
430 */
431 ret = bma180_set_bits(data, BMA250_INT_MAP_REG, BMA250_INT1_DATA_MASK, 1);
432 if (ret)
433 goto err;
434
435 return 0;
436
437 err:
438 dev_err(&data->client->dev, "failed to config the chip\n");
439 return ret;
440 }
441
442 static void bma023_chip_disable(struct bma180_data *data)
443 {
444 if (bma180_set_sleep_state(data, true))
445 goto err;
446
447 return;
448
449 err:
450 dev_err(&data->client->dev, "failed to disable the chip\n");
451 }
452
453 static void bma180_chip_disable(struct bma180_data *data)
454 {
455 if (bma180_set_new_data_intr_state(data, false))
456 goto err;
457 if (bma180_set_ee_writing_state(data, false))
458 goto err;
459 if (bma180_set_sleep_state(data, true))
460 goto err;
461
462 return;
463
464 err:
465 dev_err(&data->client->dev, "failed to disable the chip\n");
466 }
467
468 static void bma250_chip_disable(struct bma180_data *data)
469 {
470 if (bma180_set_new_data_intr_state(data, false))
471 goto err;
472 if (bma180_set_sleep_state(data, true))
473 goto err;
474
475 return;
476
477 err:
478 dev_err(&data->client->dev, "failed to disable the chip\n");
479 }
480
481 static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned int n,
482 bool micros)
483 {
484 size_t len = 0;
485 int i;
486
487 for (i = 0; i < n; i++) {
488 if (!vals[i])
489 continue;
490 len += scnprintf(buf + len, PAGE_SIZE - len,
491 micros ? "0.%06d " : "%d ", vals[i]);
492 }
493 buf[len - 1] = '\n';
494
495 return len;
496 }
497
498 static ssize_t bma180_show_filter_freq_avail(struct device *dev,
499 struct device_attribute *attr, char *buf)
500 {
501 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
502
503 return bma180_show_avail(buf, data->part_info->bw_table,
504 data->part_info->num_bw, false);
505 }
506
507 static ssize_t bma180_show_scale_avail(struct device *dev,
508 struct device_attribute *attr, char *buf)
509 {
510 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
511
512 return bma180_show_avail(buf, data->part_info->scale_table,
513 data->part_info->num_scales, true);
514 }
515
516 static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
517 S_IRUGO, bma180_show_filter_freq_avail, NULL, 0);
518
519 static IIO_DEVICE_ATTR(in_accel_scale_available,
520 S_IRUGO, bma180_show_scale_avail, NULL, 0);
521
522 static struct attribute *bma180_attributes[] = {
523 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.
524 dev_attr.attr,
525 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
526 NULL,
527 };
528
529 static const struct attribute_group bma180_attrs_group = {
530 .attrs = bma180_attributes,
531 };
532
533 static int bma180_read_raw(struct iio_dev *indio_dev,
534 struct iio_chan_spec const *chan, int *val, int *val2,
535 long mask)
536 {
537 struct bma180_data *data = iio_priv(indio_dev);
538 int ret;
539
540 switch (mask) {
541 case IIO_CHAN_INFO_RAW:
542 ret = iio_device_claim_direct_mode(indio_dev);
543 if (ret)
544 return ret;
545
546 mutex_lock(&data->mutex);
547 ret = bma180_get_data_reg(data, chan->scan_index);
548 mutex_unlock(&data->mutex);
549 iio_device_release_direct_mode(indio_dev);
550 if (ret < 0)
551 return ret;
552 if (chan->scan_type.sign == 's') {
553 *val = sign_extend32(ret >> chan->scan_type.shift,
554 chan->scan_type.realbits - 1);
555 } else {
556 *val = ret;
557 }
558 return IIO_VAL_INT;
559 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
560 *val = data->bw;
561 return IIO_VAL_INT;
562 case IIO_CHAN_INFO_SCALE:
563 switch (chan->type) {
564 case IIO_ACCEL:
565 *val = 0;
566 *val2 = data->scale;
567 return IIO_VAL_INT_PLUS_MICRO;
568 case IIO_TEMP:
569 *val = 500;
570 return IIO_VAL_INT;
571 default:
572 return -EINVAL;
573 }
574 case IIO_CHAN_INFO_OFFSET:
575 *val = data->part_info->temp_offset;
576 return IIO_VAL_INT;
577 default:
578 return -EINVAL;
579 }
580 }
581
582 static int bma180_write_raw(struct iio_dev *indio_dev,
583 struct iio_chan_spec const *chan, int val, int val2, long mask)
584 {
585 struct bma180_data *data = iio_priv(indio_dev);
586 int ret;
587
588 switch (mask) {
589 case IIO_CHAN_INFO_SCALE:
590 if (val)
591 return -EINVAL;
592 mutex_lock(&data->mutex);
593 ret = bma180_set_scale(data, val2);
594 mutex_unlock(&data->mutex);
595 return ret;
596 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
597 if (val2)
598 return -EINVAL;
599 mutex_lock(&data->mutex);
600 ret = bma180_set_bw(data, val);
601 mutex_unlock(&data->mutex);
602 return ret;
603 default:
604 return -EINVAL;
605 }
606 }
607
608 static const struct iio_info bma180_info = {
609 .attrs = &bma180_attrs_group,
610 .read_raw = bma180_read_raw,
611 .write_raw = bma180_write_raw,
612 };
613
614 static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
615
616 static int bma180_get_power_mode(struct iio_dev *indio_dev,
617 const struct iio_chan_spec *chan)
618 {
619 struct bma180_data *data = iio_priv(indio_dev);
620
621 return data->pmode;
622 }
623
624 static int bma180_set_power_mode(struct iio_dev *indio_dev,
625 const struct iio_chan_spec *chan, unsigned int mode)
626 {
627 struct bma180_data *data = iio_priv(indio_dev);
628 int ret;
629
630 mutex_lock(&data->mutex);
631 ret = bma180_set_pmode(data, mode);
632 mutex_unlock(&data->mutex);
633
634 return ret;
635 }
636
637 static const struct iio_mount_matrix *
638 bma180_accel_get_mount_matrix(const struct iio_dev *indio_dev,
639 const struct iio_chan_spec *chan)
640 {
641 struct bma180_data *data = iio_priv(indio_dev);
642
643 return &data->orientation;
644 }
645
646 static const struct iio_enum bma180_power_mode_enum = {
647 .items = bma180_power_modes,
648 .num_items = ARRAY_SIZE(bma180_power_modes),
649 .get = bma180_get_power_mode,
650 .set = bma180_set_power_mode,
651 };
652
653 static const struct iio_chan_spec_ext_info bma023_ext_info[] = {
654 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
655 { }
656 };
657
658 static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
659 IIO_ENUM("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
660 IIO_ENUM_AVAILABLE("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
661 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
662 { }
663 };
664
665 #define BMA023_ACC_CHANNEL(_axis, _bits) { \
666 .type = IIO_ACCEL, \
667 .modified = 1, \
668 .channel2 = IIO_MOD_##_axis, \
669 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
670 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
671 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
672 .scan_index = AXIS_##_axis, \
673 .scan_type = { \
674 .sign = 's', \
675 .realbits = _bits, \
676 .storagebits = 16, \
677 .shift = 16 - _bits, \
678 }, \
679 .ext_info = bma023_ext_info, \
680 }
681
682 #define BMA150_TEMP_CHANNEL { \
683 .type = IIO_TEMP, \
684 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
685 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
686 .scan_index = TEMP, \
687 .scan_type = { \
688 .sign = 'u', \
689 .realbits = 8, \
690 .storagebits = 16, \
691 }, \
692 }
693
694 #define BMA180_ACC_CHANNEL(_axis, _bits) { \
695 .type = IIO_ACCEL, \
696 .modified = 1, \
697 .channel2 = IIO_MOD_##_axis, \
698 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
699 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
700 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
701 .scan_index = AXIS_##_axis, \
702 .scan_type = { \
703 .sign = 's', \
704 .realbits = _bits, \
705 .storagebits = 16, \
706 .shift = 16 - _bits, \
707 }, \
708 .ext_info = bma180_ext_info, \
709 }
710
711 #define BMA180_TEMP_CHANNEL { \
712 .type = IIO_TEMP, \
713 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
714 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
715 .scan_index = TEMP, \
716 .scan_type = { \
717 .sign = 's', \
718 .realbits = 8, \
719 .storagebits = 16, \
720 }, \
721 }
722
723 static const struct iio_chan_spec bma023_channels[] = {
724 BMA023_ACC_CHANNEL(X, 10),
725 BMA023_ACC_CHANNEL(Y, 10),
726 BMA023_ACC_CHANNEL(Z, 10),
727 IIO_CHAN_SOFT_TIMESTAMP(4),
728 };
729
730 static const struct iio_chan_spec bma150_channels[] = {
731 BMA023_ACC_CHANNEL(X, 10),
732 BMA023_ACC_CHANNEL(Y, 10),
733 BMA023_ACC_CHANNEL(Z, 10),
734 BMA150_TEMP_CHANNEL,
735 IIO_CHAN_SOFT_TIMESTAMP(4),
736 };
737
738 static const struct iio_chan_spec bma180_channels[] = {
739 BMA180_ACC_CHANNEL(X, 14),
740 BMA180_ACC_CHANNEL(Y, 14),
741 BMA180_ACC_CHANNEL(Z, 14),
742 BMA180_TEMP_CHANNEL,
743 IIO_CHAN_SOFT_TIMESTAMP(4),
744 };
745
746 static const struct iio_chan_spec bma250_channels[] = {
747 BMA180_ACC_CHANNEL(X, 10),
748 BMA180_ACC_CHANNEL(Y, 10),
749 BMA180_ACC_CHANNEL(Z, 10),
750 BMA180_TEMP_CHANNEL,
751 IIO_CHAN_SOFT_TIMESTAMP(4),
752 };
753
754 static const struct bma180_part_info bma180_part_info[] = {
755 [BMA023] = {
756 .chip_id = BMA023_ID_REG_VAL,
757 .channels = bma023_channels,
758 .num_channels = ARRAY_SIZE(bma023_channels),
759 .scale_table = bma023_scale_table,
760 .num_scales = ARRAY_SIZE(bma023_scale_table),
761 .bw_table = bma023_bw_table,
762 .num_bw = ARRAY_SIZE(bma023_bw_table),
763 /* No temperature channel */
764 .temp_offset = 0,
765 .int_reset_reg = BMA023_CTRL_REG0,
766 .int_reset_mask = BMA023_INT_RESET_MASK,
767 .sleep_reg = BMA023_CTRL_REG0,
768 .sleep_mask = BMA023_SLEEP,
769 .bw_reg = BMA023_CTRL_REG2,
770 .bw_mask = BMA023_BW_MASK,
771 .scale_reg = BMA023_CTRL_REG2,
772 .scale_mask = BMA023_RANGE_MASK,
773 /* No power mode on bma023 */
774 .power_reg = 0,
775 .power_mask = 0,
776 .lowpower_val = 0,
777 .int_enable_reg = BMA023_CTRL_REG3,
778 .int_enable_mask = BMA023_NEW_DATA_INT,
779 .softreset_reg = BMA023_CTRL_REG0,
780 .softreset_val = BMA023_RESET_VAL,
781 .chip_config = bma023_chip_config,
782 .chip_disable = bma023_chip_disable,
783 },
784 [BMA150] = {
785 .chip_id = BMA023_ID_REG_VAL,
786 .channels = bma150_channels,
787 .num_channels = ARRAY_SIZE(bma150_channels),
788 .scale_table = bma023_scale_table,
789 .num_scales = ARRAY_SIZE(bma023_scale_table),
790 .bw_table = bma023_bw_table,
791 .num_bw = ARRAY_SIZE(bma023_bw_table),
792 .temp_offset = -60, /* 0 LSB @ -30 degree C */
793 .int_reset_reg = BMA023_CTRL_REG0,
794 .int_reset_mask = BMA023_INT_RESET_MASK,
795 .sleep_reg = BMA023_CTRL_REG0,
796 .sleep_mask = BMA023_SLEEP,
797 .bw_reg = BMA023_CTRL_REG2,
798 .bw_mask = BMA023_BW_MASK,
799 .scale_reg = BMA023_CTRL_REG2,
800 .scale_mask = BMA023_RANGE_MASK,
801 /* No power mode on bma150 */
802 .power_reg = 0,
803 .power_mask = 0,
804 .lowpower_val = 0,
805 .int_enable_reg = BMA023_CTRL_REG3,
806 .int_enable_mask = BMA023_NEW_DATA_INT,
807 .softreset_reg = BMA023_CTRL_REG0,
808 .softreset_val = BMA023_RESET_VAL,
809 .chip_config = bma023_chip_config,
810 .chip_disable = bma023_chip_disable,
811 },
812 [BMA180] = {
813 .chip_id = BMA180_ID_REG_VAL,
814 .channels = bma180_channels,
815 .num_channels = ARRAY_SIZE(bma180_channels),
816 .scale_table = bma180_scale_table,
817 .num_scales = ARRAY_SIZE(bma180_scale_table),
818 .bw_table = bma180_bw_table,
819 .num_bw = ARRAY_SIZE(bma180_bw_table),
820 .temp_offset = 48, /* 0 LSB @ 24 degree C */
821 .int_reset_reg = BMA180_CTRL_REG0,
822 .int_reset_mask = BMA180_RESET_INT,
823 .sleep_reg = BMA180_CTRL_REG0,
824 .sleep_mask = BMA180_SLEEP,
825 .bw_reg = BMA180_BW_TCS,
826 .bw_mask = BMA180_BW,
827 .scale_reg = BMA180_OFFSET_LSB1,
828 .scale_mask = BMA180_RANGE,
829 .power_reg = BMA180_TCO_Z,
830 .power_mask = BMA180_MODE_CONFIG,
831 .lowpower_val = BMA180_LOW_POWER,
832 .int_enable_reg = BMA180_CTRL_REG3,
833 .int_enable_mask = BMA180_NEW_DATA_INT,
834 .softreset_reg = BMA180_RESET,
835 .softreset_val = BMA180_RESET_VAL,
836 .chip_config = bma180_chip_config,
837 .chip_disable = bma180_chip_disable,
838 },
839 [BMA250] = {
840 .chip_id = BMA250_ID_REG_VAL,
841 .channels = bma250_channels,
842 .num_channels = ARRAY_SIZE(bma250_channels),
843 .scale_table = bma250_scale_table,
844 .num_scales = ARRAY_SIZE(bma250_scale_table),
845 .bw_table = bma250_bw_table,
846 .num_bw = ARRAY_SIZE(bma250_bw_table),
847 .temp_offset = 48, /* 0 LSB @ 24 degree C */
848 .int_reset_reg = BMA250_INT_RESET_REG,
849 .int_reset_mask = BMA250_INT_RESET_MASK,
850 .sleep_reg = BMA250_POWER_REG,
851 .sleep_mask = BMA250_SUSPEND_MASK,
852 .bw_reg = BMA250_BW_REG,
853 .bw_mask = BMA250_BW_MASK,
854 .bw_offset = BMA250_BW_OFFSET,
855 .scale_reg = BMA250_RANGE_REG,
856 .scale_mask = BMA250_RANGE_MASK,
857 .power_reg = BMA250_POWER_REG,
858 .power_mask = BMA250_LOWPOWER_MASK,
859 .lowpower_val = 1,
860 .int_enable_reg = BMA250_INT_ENABLE_REG,
861 .int_enable_mask = BMA250_DATA_INTEN_MASK,
862 .softreset_reg = BMA250_RESET_REG,
863 .softreset_val = BMA180_RESET_VAL,
864 .chip_config = bma250_chip_config,
865 .chip_disable = bma250_chip_disable,
866 },
867 };
868
869 static irqreturn_t bma180_trigger_handler(int irq, void *p)
870 {
871 struct iio_poll_func *pf = p;
872 struct iio_dev *indio_dev = pf->indio_dev;
873 struct bma180_data *data = iio_priv(indio_dev);
874 s64 time_ns = iio_get_time_ns(indio_dev);
875 int bit, ret, i = 0;
876
877 mutex_lock(&data->mutex);
878
879 iio_for_each_active_channel(indio_dev, bit) {
880 ret = bma180_get_data_reg(data, bit);
881 if (ret < 0) {
882 mutex_unlock(&data->mutex);
883 goto err;
884 }
885 data->scan.chan[i++] = ret;
886 }
887
888 mutex_unlock(&data->mutex);
889
890 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, time_ns);
891 err:
892 iio_trigger_notify_done(indio_dev->trig);
893
894 return IRQ_HANDLED;
895 }
896
897 static int bma180_data_rdy_trigger_set_state(struct iio_trigger *trig,
898 bool state)
899 {
900 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
901 struct bma180_data *data = iio_priv(indio_dev);
902
903 return bma180_set_new_data_intr_state(data, state);
904 }
905
906 static void bma180_trig_reen(struct iio_trigger *trig)
907 {
908 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
909 struct bma180_data *data = iio_priv(indio_dev);
910 int ret;
911
912 ret = bma180_reset_intr(data);
913 if (ret)
914 dev_err(&data->client->dev, "failed to reset interrupt\n");
915 }
916
917 static const struct iio_trigger_ops bma180_trigger_ops = {
918 .set_trigger_state = bma180_data_rdy_trigger_set_state,
919 .reenable = bma180_trig_reen,
920 };
921
922 static int bma180_probe(struct i2c_client *client)
923 {
924 const struct i2c_device_id *id = i2c_client_get_device_id(client);
925 struct device *dev = &client->dev;
926 struct bma180_data *data;
927 struct iio_dev *indio_dev;
928 int ret;
929
930 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
931 if (!indio_dev)
932 return -ENOMEM;
933
934 data = iio_priv(indio_dev);
935 i2c_set_clientdata(client, indio_dev);
936 data->client = client;
937 data->part_info = i2c_get_match_data(client);
938
939 ret = iio_read_mount_matrix(dev, &data->orientation);
940 if (ret)
941 return ret;
942
943 data->vdd_supply = devm_regulator_get(dev, "vdd");
944 if (IS_ERR(data->vdd_supply))
945 return dev_err_probe(dev, PTR_ERR(data->vdd_supply),
946 "Failed to get vdd regulator\n");
947
948 data->vddio_supply = devm_regulator_get(dev, "vddio");
949 if (IS_ERR(data->vddio_supply))
950 return dev_err_probe(dev, PTR_ERR(data->vddio_supply),
951 "Failed to get vddio regulator\n");
952
953 /* Typical voltage 2.4V these are min and max */
954 ret = regulator_set_voltage(data->vdd_supply, 1620000, 3600000);
955 if (ret)
956 return ret;
957 ret = regulator_set_voltage(data->vddio_supply, 1200000, 3600000);
958 if (ret)
959 return ret;
960 ret = regulator_enable(data->vdd_supply);
961 if (ret) {
962 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
963 return ret;
964 }
965 ret = regulator_enable(data->vddio_supply);
966 if (ret) {
967 dev_err(dev, "Failed to enable vddio regulator: %d\n", ret);
968 goto err_disable_vdd;
969 }
970 /* Wait to make sure we started up properly (3 ms at least) */
971 usleep_range(3000, 5000);
972
973 ret = data->part_info->chip_config(data);
974 if (ret < 0)
975 goto err_chip_disable;
976
977 mutex_init(&data->mutex);
978 indio_dev->channels = data->part_info->channels;
979 indio_dev->num_channels = data->part_info->num_channels;
980 indio_dev->name = id->name;
981 indio_dev->modes = INDIO_DIRECT_MODE;
982 indio_dev->info = &bma180_info;
983
984 if (client->irq > 0) {
985 data->trig = iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name,
986 iio_device_id(indio_dev));
987 if (!data->trig) {
988 ret = -ENOMEM;
989 goto err_chip_disable;
990 }
991
992 ret = devm_request_irq(dev, client->irq,
993 iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING,
994 "bma180_event", data->trig);
995 if (ret) {
996 dev_err(dev, "unable to request IRQ\n");
997 goto err_trigger_free;
998 }
999
1000 data->trig->ops = &bma180_trigger_ops;
1001 iio_trigger_set_drvdata(data->trig, indio_dev);
1002
1003 ret = iio_trigger_register(data->trig);
1004 if (ret)
1005 goto err_trigger_free;
1006
1007 indio_dev->trig = iio_trigger_get(data->trig);
1008 }
1009
1010 ret = iio_triggered_buffer_setup(indio_dev, NULL,
1011 bma180_trigger_handler, NULL);
1012 if (ret < 0) {
1013 dev_err(dev, "unable to setup iio triggered buffer\n");
1014 goto err_trigger_unregister;
1015 }
1016
1017 ret = iio_device_register(indio_dev);
1018 if (ret < 0) {
1019 dev_err(dev, "unable to register iio device\n");
1020 goto err_buffer_cleanup;
1021 }
1022
1023 return 0;
1024
1025 err_buffer_cleanup:
1026 iio_triggered_buffer_cleanup(indio_dev);
1027 err_trigger_unregister:
1028 if (data->trig)
1029 iio_trigger_unregister(data->trig);
1030 err_trigger_free:
1031 iio_trigger_free(data->trig);
1032 err_chip_disable:
1033 data->part_info->chip_disable(data);
1034 regulator_disable(data->vddio_supply);
1035 err_disable_vdd:
1036 regulator_disable(data->vdd_supply);
1037
1038 return ret;
1039 }
1040
1041 static void bma180_remove(struct i2c_client *client)
1042 {
1043 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1044 struct bma180_data *data = iio_priv(indio_dev);
1045
1046 iio_device_unregister(indio_dev);
1047 iio_triggered_buffer_cleanup(indio_dev);
1048 if (data->trig) {
1049 iio_trigger_unregister(data->trig);
1050 iio_trigger_free(data->trig);
1051 }
1052
1053 mutex_lock(&data->mutex);
1054 data->part_info->chip_disable(data);
1055 mutex_unlock(&data->mutex);
1056 regulator_disable(data->vddio_supply);
1057 regulator_disable(data->vdd_supply);
1058 }
1059
1060 static int bma180_suspend(struct device *dev)
1061 {
1062 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1063 struct bma180_data *data = iio_priv(indio_dev);
1064 int ret;
1065
1066 mutex_lock(&data->mutex);
1067 ret = bma180_set_sleep_state(data, true);
1068 mutex_unlock(&data->mutex);
1069
1070 return ret;
1071 }
1072
1073 static int bma180_resume(struct device *dev)
1074 {
1075 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1076 struct bma180_data *data = iio_priv(indio_dev);
1077 int ret;
1078
1079 mutex_lock(&data->mutex);
1080 ret = bma180_set_sleep_state(data, false);
1081 mutex_unlock(&data->mutex);
1082
1083 return ret;
1084 }
1085
1086 static DEFINE_SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
1087
1088 static const struct i2c_device_id bma180_ids[] = {
1089 { "bma023", (kernel_ulong_t)&bma180_part_info[BMA023] },
1090 { "bma150", (kernel_ulong_t)&bma180_part_info[BMA150] },
1091 { "bma180", (kernel_ulong_t)&bma180_part_info[BMA180] },
1092 { "bma250", (kernel_ulong_t)&bma180_part_info[BMA250] },
1093 { "smb380", (kernel_ulong_t)&bma180_part_info[BMA150] },
1094 { }
1095 };
1096
1097 MODULE_DEVICE_TABLE(i2c, bma180_ids);
1098
1099 static const struct of_device_id bma180_of_match[] = {
1100 {
1101 .compatible = "bosch,bma023",
1102 .data = &bma180_part_info[BMA023]
1103 },
1104 {
1105 .compatible = "bosch,bma150",
1106 .data = &bma180_part_info[BMA150]
1107 },
1108 {
1109 .compatible = "bosch,bma180",
1110 .data = &bma180_part_info[BMA180]
1111 },
1112 {
1113 .compatible = "bosch,bma250",
1114 .data = &bma180_part_info[BMA250]
1115 },
1116 {
1117 .compatible = "bosch,smb380",
1118 .data = &bma180_part_info[BMA150]
1119 },
1120 { }
1121 };
1122 MODULE_DEVICE_TABLE(of, bma180_of_match);
1123
1124 static struct i2c_driver bma180_driver = {
1125 .driver = {
1126 .name = "bma180",
1127 .pm = pm_sleep_ptr(&bma180_pm_ops),
1128 .of_match_table = bma180_of_match,
1129 },
1130 .probe = bma180_probe,
1131 .remove = bma180_remove,
1132 .id_table = bma180_ids,
1133 };
1134
1135 module_i2c_driver(bma180_driver);
1136
1137 MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>");
1138 MODULE_AUTHOR("Texas Instruments, Inc.");
1139 MODULE_DESCRIPTION("Bosch BMA023/BMA1x0/BMA250 triaxial acceleration sensor");
1140 MODULE_LICENSE("GPL");
Kernel DRM miscellaneous fixes and cross-tree changes