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drm/tests: hdmi: Fix memory leaks in drm_display_mode_from_cea_vic()
[drm/drm-misc.git] / drivers / media / usb / em28xx / em28xx-core.c
blob29a7f3f19b56efcc625c469dfce7a7575cfe0d2a
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
4 //
5 // Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
6 // Markus Rechberger <mrechberger@gmail.com>
7 // Mauro Carvalho Chehab <mchehab@kernel.org>
8 // Sascha Sommer <saschasommer@freenet.de>
9 // Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
10
11 #include "em28xx.h"
12
13 #include <linux/init.h>
14 #include <linux/jiffies.h>
15 #include <linux/list.h>
16 #include <linux/module.h>
17 #include <linux/slab.h>
18 #include <linux/usb.h>
19 #include <linux/vmalloc.h>
20 #include <sound/ac97_codec.h>
21 #include <media/v4l2-common.h>
22
23 #define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \
24 "Markus Rechberger <mrechberger@gmail.com>, " \
25 "Mauro Carvalho Chehab <mchehab@kernel.org>, " \
26 "Sascha Sommer <saschasommer@freenet.de>"
27
28 MODULE_AUTHOR(DRIVER_AUTHOR);
29 MODULE_DESCRIPTION(DRIVER_DESC);
30 MODULE_LICENSE("GPL v2");
31 MODULE_VERSION(EM28XX_VERSION);
32
33 /* #define ENABLE_DEBUG_ISOC_FRAMES */
34
35 static unsigned int core_debug;
36 module_param(core_debug, int, 0644);
37 MODULE_PARM_DESC(core_debug, "enable debug messages [core and isoc]");
38
39 #define em28xx_coredbg(fmt, arg...) do { \
40 if (core_debug) \
41 dev_printk(KERN_DEBUG, &dev->intf->dev, \
42 "core: %s: " fmt, __func__, ## arg); \
43 } while (0)
44
45 static unsigned int reg_debug;
46 module_param(reg_debug, int, 0644);
47 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
48
49 #define em28xx_regdbg(fmt, arg...) do { \
50 if (reg_debug) \
51 dev_printk(KERN_DEBUG, &dev->intf->dev, \
52 "reg: %s: " fmt, __func__, ## arg); \
53 } while (0)
54
55 /* FIXME: don't abuse core_debug */
56 #define em28xx_isocdbg(fmt, arg...) do { \
57 if (core_debug) \
58 dev_printk(KERN_DEBUG, &dev->intf->dev, \
59 "core: %s: " fmt, __func__, ## arg); \
60 } while (0)
61
62 /*
63 * em28xx_read_reg_req()
64 * reads data from the usb device specifying bRequest
65 */
66 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
67 char *buf, int len)
68 {
69 int ret;
70 struct usb_device *udev = interface_to_usbdev(dev->intf);
71 int pipe = usb_rcvctrlpipe(udev, 0);
72
73 if (dev->disconnected)
74 return -ENODEV;
75
76 if (len > URB_MAX_CTRL_SIZE)
77 return -EINVAL;
78
79 mutex_lock(&dev->ctrl_urb_lock);
80 ret = usb_control_msg(udev, pipe, req,
81 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
82 0x0000, reg, dev->urb_buf, len, 1000);
83 if (ret < 0) {
84 em28xx_regdbg("(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x failed with error %i\n",
85 pipe,
86 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
87 req, 0, 0,
88 reg & 0xff, reg >> 8,
89 len & 0xff, len >> 8, ret);
90 mutex_unlock(&dev->ctrl_urb_lock);
91 return usb_translate_errors(ret);
92 }
93
94 if (len)
95 memcpy(buf, dev->urb_buf, len);
96
97 mutex_unlock(&dev->ctrl_urb_lock);
98
99 em28xx_regdbg("(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x <<< %*ph\n",
100 pipe, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
101 req, 0, 0,
102 reg & 0xff, reg >> 8,
103 len & 0xff, len >> 8, len, buf);
104
105 return ret;
106 }
107
108 /*
109 * em28xx_read_reg_req()
110 * reads data from the usb device specifying bRequest
111 */
112 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
113 {
114 int ret;
115 u8 val;
116
117 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
118 if (ret < 0)
119 return ret;
120
121 return val;
122 }
123
124 int em28xx_read_reg(struct em28xx *dev, u16 reg)
125 {
126 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
127 }
128 EXPORT_SYMBOL_GPL(em28xx_read_reg);
129
130 /*
131 * em28xx_write_regs_req()
132 * sends data to the usb device, specifying bRequest
133 */
134 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
135 int len)
136 {
137 int ret;
138 struct usb_device *udev = interface_to_usbdev(dev->intf);
139 int pipe = usb_sndctrlpipe(udev, 0);
140
141 if (dev->disconnected)
142 return -ENODEV;
143
144 if (len < 1 || len > URB_MAX_CTRL_SIZE)
145 return -EINVAL;
146
147 mutex_lock(&dev->ctrl_urb_lock);
148 memcpy(dev->urb_buf, buf, len);
149 ret = usb_control_msg(udev, pipe, req,
150 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
151 0x0000, reg, dev->urb_buf, len, 1000);
152 mutex_unlock(&dev->ctrl_urb_lock);
153
154 if (ret < 0) {
155 em28xx_regdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>> %*ph failed with error %i\n",
156 pipe,
157 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
158 req, 0, 0,
159 reg & 0xff, reg >> 8,
160 len & 0xff, len >> 8, len, buf, ret);
161 return usb_translate_errors(ret);
162 }
163
164 em28xx_regdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>> %*ph\n",
165 pipe,
166 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
167 req, 0, 0,
168 reg & 0xff, reg >> 8,
169 len & 0xff, len >> 8, len, buf);
170
171 if (dev->wait_after_write)
172 msleep(dev->wait_after_write);
173
174 return ret;
175 }
176
177 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
178 {
179 return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
180 }
181 EXPORT_SYMBOL_GPL(em28xx_write_regs);
182
183 /* Write a single register */
184 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
185 {
186 return em28xx_write_regs(dev, reg, &val, 1);
187 }
188 EXPORT_SYMBOL_GPL(em28xx_write_reg);
189
190 /*
191 * em28xx_write_reg_bits()
192 * sets only some bits (specified by bitmask) of a register, by first reading
193 * the actual value
194 */
195 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
196 u8 bitmask)
197 {
198 int oldval;
199 u8 newval;
200
201 oldval = em28xx_read_reg(dev, reg);
202 if (oldval < 0)
203 return oldval;
204
205 newval = (((u8)oldval) & ~bitmask) | (val & bitmask);
206
207 return em28xx_write_regs(dev, reg, &newval, 1);
208 }
209 EXPORT_SYMBOL_GPL(em28xx_write_reg_bits);
210
211 /*
212 * em28xx_toggle_reg_bits()
213 * toggles/inverts the bits (specified by bitmask) of a register
214 */
215 int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask)
216 {
217 int oldval;
218 u8 newval;
219
220 oldval = em28xx_read_reg(dev, reg);
221 if (oldval < 0)
222 return oldval;
223
224 newval = (~oldval & bitmask) | (oldval & ~bitmask);
225
226 return em28xx_write_reg(dev, reg, newval);
227 }
228 EXPORT_SYMBOL_GPL(em28xx_toggle_reg_bits);
229
230 /*
231 * em28xx_is_ac97_ready()
232 * Checks if ac97 is ready
233 */
234 static int em28xx_is_ac97_ready(struct em28xx *dev)
235 {
236 unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_AC97_XFER_TIMEOUT);
237 int ret;
238
239 /* Wait up to 50 ms for AC97 command to complete */
240 while (time_is_after_jiffies(timeout)) {
241 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
242 if (ret < 0)
243 return ret;
244
245 if (!(ret & 0x01))
246 return 0;
247 msleep(5);
248 }
249
250 dev_warn(&dev->intf->dev,
251 "AC97 command still being executed: not handled properly!\n");
252 return -EBUSY;
253 }
254
255 /*
256 * em28xx_read_ac97()
257 * write a 16 bit value to the specified AC97 address (LSB first!)
258 */
259 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
260 {
261 int ret;
262 u8 addr = (reg & 0x7f) | 0x80;
263 __le16 val;
264
265 ret = em28xx_is_ac97_ready(dev);
266 if (ret < 0)
267 return ret;
268
269 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
270 if (ret < 0)
271 return ret;
272
273 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
274 (u8 *)&val, sizeof(val));
275
276 if (ret < 0)
277 return ret;
278 return le16_to_cpu(val);
279 }
280 EXPORT_SYMBOL_GPL(em28xx_read_ac97);
281
282 /*
283 * em28xx_write_ac97()
284 * write a 16 bit value to the specified AC97 address (LSB first!)
285 */
286 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
287 {
288 int ret;
289 u8 addr = reg & 0x7f;
290 __le16 value;
291
292 value = cpu_to_le16(val);
293
294 ret = em28xx_is_ac97_ready(dev);
295 if (ret < 0)
296 return ret;
297
298 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *)&value, 2);
299 if (ret < 0)
300 return ret;
301
302 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
303 if (ret < 0)
304 return ret;
305
306 return 0;
307 }
308 EXPORT_SYMBOL_GPL(em28xx_write_ac97);
309
310 struct em28xx_vol_itable {
311 enum em28xx_amux mux;
312 u8 reg;
313 };
314
315 static struct em28xx_vol_itable inputs[] = {
316 { EM28XX_AMUX_VIDEO, AC97_VIDEO },
317 { EM28XX_AMUX_LINE_IN, AC97_LINE },
318 { EM28XX_AMUX_PHONE, AC97_PHONE },
319 { EM28XX_AMUX_MIC, AC97_MIC },
320 { EM28XX_AMUX_CD, AC97_CD },
321 { EM28XX_AMUX_AUX, AC97_AUX },
322 { EM28XX_AMUX_PCM_OUT, AC97_PCM },
323 };
324
325 static int set_ac97_input(struct em28xx *dev)
326 {
327 int ret, i;
328 enum em28xx_amux amux = dev->ctl_ainput;
329
330 /*
331 * EM28XX_AMUX_VIDEO2 is a special case used to indicate that
332 * em28xx should point to LINE IN, while AC97 should use VIDEO
333 */
334 if (amux == EM28XX_AMUX_VIDEO2)
335 amux = EM28XX_AMUX_VIDEO;
336
337 /* Mute all entres but the one that were selected */
338 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
339 if (amux == inputs[i].mux)
340 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
341 else
342 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
343
344 if (ret < 0)
345 dev_warn(&dev->intf->dev,
346 "couldn't setup AC97 register %d\n",
347 inputs[i].reg);
348 }
349 return 0;
350 }
351
352 static int em28xx_set_audio_source(struct em28xx *dev)
353 {
354 int ret;
355 u8 input;
356
357 if (dev->board.is_em2800) {
358 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
359 input = EM2800_AUDIO_SRC_TUNER;
360 else
361 input = EM2800_AUDIO_SRC_LINE;
362
363 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
364 if (ret < 0)
365 return ret;
366 }
367
368 if (dev->has_msp34xx) {
369 input = EM28XX_AUDIO_SRC_TUNER;
370 } else {
371 switch (dev->ctl_ainput) {
372 case EM28XX_AMUX_VIDEO:
373 input = EM28XX_AUDIO_SRC_TUNER;
374 break;
375 default:
376 input = EM28XX_AUDIO_SRC_LINE;
377 break;
378 }
379 }
380
381 if (dev->board.mute_gpio && dev->mute)
382 em28xx_gpio_set(dev, dev->board.mute_gpio);
383 else
384 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
385
386 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
387 if (ret < 0)
388 return ret;
389 usleep_range(10000, 11000);
390
391 switch (dev->audio_mode.ac97) {
392 case EM28XX_NO_AC97:
393 break;
394 default:
395 ret = set_ac97_input(dev);
396 }
397
398 return ret;
399 }
400
401 struct em28xx_vol_otable {
402 enum em28xx_aout mux;
403 u8 reg;
404 };
405
406 static const struct em28xx_vol_otable outputs[] = {
407 { EM28XX_AOUT_MASTER, AC97_MASTER },
408 { EM28XX_AOUT_LINE, AC97_HEADPHONE },
409 { EM28XX_AOUT_MONO, AC97_MASTER_MONO },
410 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER },
411 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER },
412 };
413
414 int em28xx_audio_analog_set(struct em28xx *dev)
415 {
416 int ret, i;
417 u8 xclk;
418
419 /* Set GPIOs here for boards without audio */
420 if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE)
421 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
422
423 /*
424 * It is assumed that all devices use master volume for output.
425 * It would be possible to use also line output.
426 */
427 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
428 /* Mute all outputs */
429 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
430 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
431 if (ret < 0)
432 dev_warn(&dev->intf->dev,
433 "couldn't setup AC97 register %d\n",
434 outputs[i].reg);
435 }
436 }
437
438 xclk = dev->board.xclk & 0x7f;
439 if (!dev->mute)
440 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
441
442 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
443 if (ret < 0)
444 return ret;
445 usleep_range(10000, 11000);
446
447 /* Selects the proper audio input */
448 ret = em28xx_set_audio_source(dev);
449
450 /* Sets volume */
451 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
452 int vol;
453
454 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200);
455 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031);
456 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80);
457
458 /* LSB: left channel - both channels with the same level */
459 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
460
461 /* Mute device, if needed */
462 if (dev->mute)
463 vol |= 0x8000;
464
465 /* Sets volume */
466 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
467 if (dev->ctl_aoutput & outputs[i].mux)
468 ret = em28xx_write_ac97(dev, outputs[i].reg,
469 vol);
470 if (ret < 0)
471 dev_warn(&dev->intf->dev,
472 "couldn't setup AC97 register %d\n",
473 outputs[i].reg);
474 }
475
476 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
477 int sel = ac97_return_record_select(dev->ctl_aoutput);
478
479 /*
480 * Use the same input for both left and right
481 * channels
482 */
483 sel |= (sel << 8);
484
485 em28xx_write_ac97(dev, AC97_REC_SEL, sel);
486 }
487 }
488
489 return ret;
490 }
491 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
492
493 int em28xx_audio_setup(struct em28xx *dev)
494 {
495 int vid1, vid2, feat, cfg;
496 u32 vid = 0;
497 u8 i2s_samplerates;
498
499 if (dev->chip_id == CHIP_ID_EM2870 ||
500 dev->chip_id == CHIP_ID_EM2874 ||
501 dev->chip_id == CHIP_ID_EM28174 ||
502 dev->chip_id == CHIP_ID_EM28178) {
503 /* Digital only device - don't load any alsa module */
504 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
505 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
506 return 0;
507 }
508
509 /* See how this device is configured */
510 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
511 dev_info(&dev->intf->dev, "Config register raw data: 0x%02x\n", cfg);
512 if (cfg < 0) { /* Register read error */
513 /* Be conservative */
514 dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
515 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
516 /* The device doesn't have vendor audio at all */
517 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
518 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
519 return 0;
520 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
521 dev->int_audio_type = EM28XX_INT_AUDIO_I2S;
522 if (dev->chip_id < CHIP_ID_EM2860 &&
523 (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
524 EM2820_CHIPCFG_I2S_1_SAMPRATE)
525 i2s_samplerates = 1;
526 else if (dev->chip_id >= CHIP_ID_EM2860 &&
527 (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
528 EM2860_CHIPCFG_I2S_5_SAMPRATES)
529 i2s_samplerates = 5;
530 else
531 i2s_samplerates = 3;
532 dev_info(&dev->intf->dev, "I2S Audio (%d sample rate(s))\n",
533 i2s_samplerates);
534 /* Skip the code that does AC97 vendor detection */
535 dev->audio_mode.ac97 = EM28XX_NO_AC97;
536 goto init_audio;
537 } else {
538 dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
539 }
540
541 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
542
543 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
544 if (vid1 < 0) {
545 /*
546 * Device likely doesn't support AC97
547 * Note: (some) em2800 devices without eeprom reports 0x91 on
548 * CHIPCFG register, even not having an AC97 chip
549 */
550 dev_warn(&dev->intf->dev,
551 "AC97 chip type couldn't be determined\n");
552 dev->audio_mode.ac97 = EM28XX_NO_AC97;
553 if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR)
554 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
555 dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
556 goto init_audio;
557 }
558
559 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
560 if (vid2 < 0)
561 goto init_audio;
562
563 vid = vid1 << 16 | vid2;
564 dev_warn(&dev->intf->dev, "AC97 vendor ID = 0x%08x\n", vid);
565
566 feat = em28xx_read_ac97(dev, AC97_RESET);
567 if (feat < 0)
568 goto init_audio;
569
570 dev_warn(&dev->intf->dev, "AC97 features = 0x%04x\n", feat);
571
572 /* Try to identify what audio processor we have */
573 if ((vid == 0xffffffff || vid == 0x83847650) && feat == 0x6a90)
574 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
575 else if ((vid >> 8) == 0x838476)
576 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
577
578 init_audio:
579 /* Reports detected AC97 processor */
580 switch (dev->audio_mode.ac97) {
581 case EM28XX_NO_AC97:
582 dev_info(&dev->intf->dev, "No AC97 audio processor\n");
583 break;
584 case EM28XX_AC97_EM202:
585 dev_info(&dev->intf->dev,
586 "Empia 202 AC97 audio processor detected\n");
587 break;
588 case EM28XX_AC97_SIGMATEL:
589 dev_info(&dev->intf->dev,
590 "Sigmatel audio processor detected (stac 97%02x)\n",
591 vid & 0xff);
592 break;
593 case EM28XX_AC97_OTHER:
594 dev_warn(&dev->intf->dev,
595 "Unknown AC97 audio processor detected!\n");
596 break;
597 default:
598 break;
599 }
600
601 return em28xx_audio_analog_set(dev);
602 }
603 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
604
605 const struct em28xx_led *em28xx_find_led(struct em28xx *dev,
606 enum em28xx_led_role role)
607 {
608 if (dev->board.leds) {
609 u8 k = 0;
610
611 while (dev->board.leds[k].role >= 0 &&
612 dev->board.leds[k].role < EM28XX_NUM_LED_ROLES) {
613 if (dev->board.leds[k].role == role)
614 return &dev->board.leds[k];
615 k++;
616 }
617 }
618 return NULL;
619 }
620 EXPORT_SYMBOL_GPL(em28xx_find_led);
621
622 int em28xx_capture_start(struct em28xx *dev, int start)
623 {
624 int rc;
625 const struct em28xx_led *led = NULL;
626
627 if (dev->chip_id == CHIP_ID_EM2874 ||
628 dev->chip_id == CHIP_ID_EM2884 ||
629 dev->chip_id == CHIP_ID_EM28174 ||
630 dev->chip_id == CHIP_ID_EM28178) {
631 /* The Transport Stream Enable Register moved in em2874 */
632 if (dev->dvb_xfer_bulk) {
633 /* Max Tx Size = 188 * 256 = 48128 - LCM(188,512) * 2 */
634 em28xx_write_reg(dev, (dev->ts == PRIMARY_TS) ?
635 EM2874_R5D_TS1_PKT_SIZE :
636 EM2874_R5E_TS2_PKT_SIZE,
637 0xff);
638 } else {
639 /* ISOC Maximum Transfer Size = 188 * 5 */
640 em28xx_write_reg(dev, (dev->ts == PRIMARY_TS) ?
641 EM2874_R5D_TS1_PKT_SIZE :
642 EM2874_R5E_TS2_PKT_SIZE,
643 dev->dvb_max_pkt_size_isoc / 188);
644 }
645 if (dev->ts == PRIMARY_TS)
646 rc = em28xx_write_reg_bits(dev,
647 EM2874_R5F_TS_ENABLE,
648 start ? EM2874_TS1_CAPTURE_ENABLE : 0x00,
649 EM2874_TS1_CAPTURE_ENABLE | EM2874_TS1_FILTER_ENABLE | EM2874_TS1_NULL_DISCARD);
650 else
651 rc = em28xx_write_reg_bits(dev,
652 EM2874_R5F_TS_ENABLE,
653 start ? EM2874_TS2_CAPTURE_ENABLE : 0x00,
654 EM2874_TS2_CAPTURE_ENABLE | EM2874_TS2_FILTER_ENABLE | EM2874_TS2_NULL_DISCARD);
655 } else {
656 /* FIXME: which is the best order? */
657 /* video registers are sampled by VREF */
658 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
659 start ? 0x10 : 0x00, 0x10);
660 if (rc < 0)
661 return rc;
662
663 if (start) {
664 if (dev->is_webcam)
665 rc = em28xx_write_reg(dev, 0x13, 0x0c);
666
667 /* Enable video capture */
668 rc = em28xx_write_reg(dev, 0x48, 0x00);
669 if (rc < 0)
670 return rc;
671
672 if (dev->mode == EM28XX_ANALOG_MODE)
673 rc = em28xx_write_reg(dev,
674 EM28XX_R12_VINENABLE,
675 0x67);
676 else
677 rc = em28xx_write_reg(dev,
678 EM28XX_R12_VINENABLE,
679 0x37);
680 if (rc < 0)
681 return rc;
682
683 usleep_range(10000, 11000);
684 } else {
685 /* disable video capture */
686 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
687 }
688 }
689
690 if (dev->mode == EM28XX_ANALOG_MODE)
691 led = em28xx_find_led(dev, EM28XX_LED_ANALOG_CAPTURING);
692 else if (dev->ts == PRIMARY_TS)
693 led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING);
694 else
695 led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING_TS2);
696
697 if (led)
698 em28xx_write_reg_bits(dev, led->gpio_reg,
699 (!start ^ led->inverted) ?
700 ~led->gpio_mask : led->gpio_mask,
701 led->gpio_mask);
702
703 return rc;
704 }
705
706 int em28xx_gpio_set(struct em28xx *dev, const struct em28xx_reg_seq *gpio)
707 {
708 int rc = 0;
709
710 if (!gpio)
711 return rc;
712
713 if (dev->mode != EM28XX_SUSPEND) {
714 em28xx_write_reg(dev, 0x48, 0x00);
715 if (dev->mode == EM28XX_ANALOG_MODE)
716 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
717 else
718 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
719 usleep_range(10000, 11000);
720 }
721
722 /* Send GPIO reset sequences specified at board entry */
723 while (gpio->sleep >= 0) {
724 if (gpio->reg >= 0) {
725 rc = em28xx_write_reg_bits(dev,
726 gpio->reg,
727 gpio->val,
728 gpio->mask);
729 if (rc < 0)
730 return rc;
731 }
732 if (gpio->sleep > 0)
733 msleep(gpio->sleep);
734
735 gpio++;
736 }
737 return rc;
738 }
739 EXPORT_SYMBOL_GPL(em28xx_gpio_set);
740
741 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
742 {
743 if (dev->mode == set_mode)
744 return 0;
745
746 if (set_mode == EM28XX_SUSPEND) {
747 dev->mode = set_mode;
748
749 /* FIXME: add suspend support for ac97 */
750
751 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
752 }
753
754 dev->mode = set_mode;
755
756 if (dev->mode == EM28XX_DIGITAL_MODE)
757 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
758 else
759 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
760 }
761 EXPORT_SYMBOL_GPL(em28xx_set_mode);
762
763 /*
764 *URB control
765 */
766
767 /*
768 * URB completion handler for isoc/bulk transfers
769 */
770 static void em28xx_irq_callback(struct urb *urb)
771 {
772 struct em28xx *dev = urb->context;
773 unsigned long flags;
774 int i;
775
776 switch (urb->status) {
777 case 0: /* success */
778 case -ETIMEDOUT: /* NAK */
779 break;
780 case -ECONNRESET: /* kill */
781 case -ENOENT:
782 case -ESHUTDOWN:
783 return;
784 default: /* error */
785 em28xx_isocdbg("urb completion error %d.\n", urb->status);
786 break;
787 }
788
789 /* Copy data from URB */
790 spin_lock_irqsave(&dev->slock, flags);
791 dev->usb_ctl.urb_data_copy(dev, urb);
792 spin_unlock_irqrestore(&dev->slock, flags);
793
794 /* Reset urb buffers */
795 for (i = 0; i < urb->number_of_packets; i++) {
796 /* isoc only (bulk: number_of_packets = 0) */
797 urb->iso_frame_desc[i].status = 0;
798 urb->iso_frame_desc[i].actual_length = 0;
799 }
800 urb->status = 0;
801
802 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
803 if (urb->status) {
804 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
805 urb->status);
806 }
807 }
808
809 /*
810 * Stop and Deallocate URBs
811 */
812 void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode)
813 {
814 struct urb *urb;
815 struct em28xx_usb_bufs *usb_bufs;
816 int i;
817
818 em28xx_isocdbg("called %s in mode %d\n", __func__, mode);
819
820 if (mode == EM28XX_DIGITAL_MODE)
821 usb_bufs = &dev->usb_ctl.digital_bufs;
822 else
823 usb_bufs = &dev->usb_ctl.analog_bufs;
824
825 for (i = 0; i < usb_bufs->num_bufs; i++) {
826 urb = usb_bufs->urb[i];
827 if (urb) {
828 if (!irqs_disabled())
829 usb_kill_urb(urb);
830 else
831 usb_unlink_urb(urb);
832
833 usb_free_urb(urb);
834 usb_bufs->urb[i] = NULL;
835 }
836 }
837
838 kfree(usb_bufs->urb);
839 kfree(usb_bufs->buf);
840
841 usb_bufs->urb = NULL;
842 usb_bufs->buf = NULL;
843 usb_bufs->num_bufs = 0;
844
845 em28xx_capture_start(dev, 0);
846 }
847 EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer);
848
849 /*
850 * Stop URBs
851 */
852 void em28xx_stop_urbs(struct em28xx *dev)
853 {
854 int i;
855 struct urb *urb;
856 struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs;
857
858 em28xx_isocdbg("called %s\n", __func__);
859
860 for (i = 0; i < isoc_bufs->num_bufs; i++) {
861 urb = isoc_bufs->urb[i];
862 if (urb) {
863 if (!irqs_disabled())
864 usb_kill_urb(urb);
865 else
866 usb_unlink_urb(urb);
867 }
868 }
869
870 em28xx_capture_start(dev, 0);
871 }
872 EXPORT_SYMBOL_GPL(em28xx_stop_urbs);
873
874 /*
875 * Allocate URBs
876 */
877 int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk,
878 int num_bufs, int max_pkt_size, int packet_multiplier)
879 {
880 struct em28xx_usb_bufs *usb_bufs;
881 struct urb *urb;
882 struct usb_device *udev = interface_to_usbdev(dev->intf);
883 int i;
884 int sb_size, pipe;
885 int j, k;
886
887 em28xx_isocdbg("em28xx: called %s in mode %d\n", __func__, mode);
888
889 /*
890 * Check mode and if we have an endpoint for the selected
891 * transfer type, select buffer
892 */
893 if (mode == EM28XX_DIGITAL_MODE) {
894 if ((xfer_bulk && !dev->dvb_ep_bulk) ||
895 (!xfer_bulk && !dev->dvb_ep_isoc)) {
896 dev_err(&dev->intf->dev,
897 "no endpoint for DVB mode and transfer type %d\n",
898 xfer_bulk > 0);
899 return -EINVAL;
900 }
901 usb_bufs = &dev->usb_ctl.digital_bufs;
902 } else if (mode == EM28XX_ANALOG_MODE) {
903 if ((xfer_bulk && !dev->analog_ep_bulk) ||
904 (!xfer_bulk && !dev->analog_ep_isoc)) {
905 dev_err(&dev->intf->dev,
906 "no endpoint for analog mode and transfer type %d\n",
907 xfer_bulk > 0);
908 return -EINVAL;
909 }
910 usb_bufs = &dev->usb_ctl.analog_bufs;
911 } else {
912 dev_err(&dev->intf->dev, "invalid mode selected\n");
913 return -EINVAL;
914 }
915
916 /* De-allocates all pending stuff */
917 em28xx_uninit_usb_xfer(dev, mode);
918
919 usb_bufs->num_bufs = num_bufs;
920
921 usb_bufs->urb = kcalloc(num_bufs, sizeof(void *), GFP_KERNEL);
922 if (!usb_bufs->urb)
923 return -ENOMEM;
924
925 usb_bufs->buf = kcalloc(num_bufs, sizeof(void *), GFP_KERNEL);
926 if (!usb_bufs->buf) {
927 kfree(usb_bufs->urb);
928 return -ENOMEM;
929 }
930
931 usb_bufs->max_pkt_size = max_pkt_size;
932 if (xfer_bulk)
933 usb_bufs->num_packets = 0;
934 else
935 usb_bufs->num_packets = packet_multiplier;
936 dev->usb_ctl.vid_buf = NULL;
937 dev->usb_ctl.vbi_buf = NULL;
938
939 sb_size = packet_multiplier * usb_bufs->max_pkt_size;
940
941 /* allocate urbs and transfer buffers */
942 for (i = 0; i < usb_bufs->num_bufs; i++) {
943 urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL);
944 if (!urb) {
945 em28xx_uninit_usb_xfer(dev, mode);
946 return -ENOMEM;
947 }
948 usb_bufs->urb[i] = urb;
949
950 usb_bufs->buf[i] = kzalloc(sb_size, GFP_KERNEL);
951 if (!usb_bufs->buf[i]) {
952 for (i--; i >= 0; i--)
953 kfree(usb_bufs->buf[i]);
954
955 em28xx_uninit_usb_xfer(dev, mode);
956 return -ENOMEM;
957 }
958
959 urb->transfer_flags = URB_FREE_BUFFER;
960
961 if (xfer_bulk) { /* bulk */
962 pipe = usb_rcvbulkpipe(udev,
963 mode == EM28XX_ANALOG_MODE ?
964 dev->analog_ep_bulk :
965 dev->dvb_ep_bulk);
966 usb_fill_bulk_urb(urb, udev, pipe, usb_bufs->buf[i],
967 sb_size, em28xx_irq_callback, dev);
968 } else { /* isoc */
969 pipe = usb_rcvisocpipe(udev,
970 mode == EM28XX_ANALOG_MODE ?
971 dev->analog_ep_isoc :
972 dev->dvb_ep_isoc);
973 usb_fill_int_urb(urb, udev, pipe, usb_bufs->buf[i],
974 sb_size, em28xx_irq_callback, dev, 1);
975 urb->transfer_flags |= URB_ISO_ASAP;
976 k = 0;
977 for (j = 0; j < usb_bufs->num_packets; j++) {
978 urb->iso_frame_desc[j].offset = k;
979 urb->iso_frame_desc[j].length =
980 usb_bufs->max_pkt_size;
981 k += usb_bufs->max_pkt_size;
982 }
983 }
984
985 urb->number_of_packets = usb_bufs->num_packets;
986 }
987
988 return 0;
989 }
990 EXPORT_SYMBOL_GPL(em28xx_alloc_urbs);
991
992 /*
993 * Allocate URBs and start IRQ
994 */
995 int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode,
996 int xfer_bulk, int num_bufs, int max_pkt_size,
997 int packet_multiplier,
998 int (*urb_data_copy)(struct em28xx *dev, struct urb *urb))
999 {
1000 struct em28xx_dmaqueue *dma_q = &dev->vidq;
1001 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
1002 struct em28xx_usb_bufs *usb_bufs;
1003 struct usb_device *udev = interface_to_usbdev(dev->intf);
1004 int i;
1005 int rc;
1006 int alloc;
1007
1008 em28xx_isocdbg("em28xx: called %s in mode %d\n", __func__, mode);
1009
1010 dev->usb_ctl.urb_data_copy = urb_data_copy;
1011
1012 if (mode == EM28XX_DIGITAL_MODE) {
1013 usb_bufs = &dev->usb_ctl.digital_bufs;
1014 /* no need to free/alloc usb buffers in digital mode */
1015 alloc = 0;
1016 } else {
1017 usb_bufs = &dev->usb_ctl.analog_bufs;
1018 alloc = 1;
1019 }
1020
1021 if (alloc) {
1022 rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs,
1023 max_pkt_size, packet_multiplier);
1024 if (rc)
1025 return rc;
1026 }
1027
1028 if (xfer_bulk) {
1029 rc = usb_clear_halt(udev, usb_bufs->urb[0]->pipe);
1030 if (rc < 0) {
1031 dev_err(&dev->intf->dev,
1032 "failed to clear USB bulk endpoint stall/halt condition (error=%i)\n",
1033 rc);
1034 em28xx_uninit_usb_xfer(dev, mode);
1035 return rc;
1036 }
1037 }
1038
1039 init_waitqueue_head(&dma_q->wq);
1040 init_waitqueue_head(&vbi_dma_q->wq);
1041
1042 em28xx_capture_start(dev, 1);
1043
1044 /* submit urbs and enables IRQ */
1045 for (i = 0; i < usb_bufs->num_bufs; i++) {
1046 rc = usb_submit_urb(usb_bufs->urb[i], GFP_KERNEL);
1047 if (rc) {
1048 dev_err(&dev->intf->dev,
1049 "submit of urb %i failed (error=%i)\n", i, rc);
1050 em28xx_uninit_usb_xfer(dev, mode);
1051 return rc;
1052 }
1053 }
1054
1055 return 0;
1056 }
1057 EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer);
1058
1059 /*
1060 * Device control list
1061 */
1062
1063 static LIST_HEAD(em28xx_devlist);
1064 static DEFINE_MUTEX(em28xx_devlist_mutex);
1065
1066 /*
1067 * Extension interface
1068 */
1069
1070 static LIST_HEAD(em28xx_extension_devlist);
1071
1072 int em28xx_register_extension(struct em28xx_ops *ops)
1073 {
1074 struct em28xx *dev = NULL;
1075
1076 mutex_lock(&em28xx_devlist_mutex);
1077 list_add_tail(&ops->next, &em28xx_extension_devlist);
1078 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1079 if (ops->init) {
1080 ops->init(dev);
1081 if (dev->dev_next)
1082 ops->init(dev->dev_next);
1083 }
1084 }
1085 mutex_unlock(&em28xx_devlist_mutex);
1086 pr_info("em28xx: Registered (%s) extension\n", ops->name);
1087 return 0;
1088 }
1089 EXPORT_SYMBOL(em28xx_register_extension);
1090
1091 void em28xx_unregister_extension(struct em28xx_ops *ops)
1092 {
1093 struct em28xx *dev = NULL;
1094
1095 mutex_lock(&em28xx_devlist_mutex);
1096 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1097 if (ops->fini) {
1098 if (dev->dev_next)
1099 ops->fini(dev->dev_next);
1100 ops->fini(dev);
1101 }
1102 }
1103 list_del(&ops->next);
1104 mutex_unlock(&em28xx_devlist_mutex);
1105 pr_info("em28xx: Removed (%s) extension\n", ops->name);
1106 }
1107 EXPORT_SYMBOL(em28xx_unregister_extension);
1108
1109 void em28xx_init_extension(struct em28xx *dev)
1110 {
1111 const struct em28xx_ops *ops = NULL;
1112
1113 mutex_lock(&em28xx_devlist_mutex);
1114 list_add_tail(&dev->devlist, &em28xx_devlist);
1115 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1116 if (ops->init) {
1117 ops->init(dev);
1118 if (dev->dev_next)
1119 ops->init(dev->dev_next);
1120 }
1121 }
1122 mutex_unlock(&em28xx_devlist_mutex);
1123 }
1124
1125 void em28xx_close_extension(struct em28xx *dev)
1126 {
1127 const struct em28xx_ops *ops = NULL;
1128
1129 mutex_lock(&em28xx_devlist_mutex);
1130 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1131 if (ops->fini) {
1132 if (dev->dev_next)
1133 ops->fini(dev->dev_next);
1134 ops->fini(dev);
1135 }
1136 }
1137 list_del(&dev->devlist);
1138 mutex_unlock(&em28xx_devlist_mutex);
1139 }
1140
1141 int em28xx_suspend_extension(struct em28xx *dev)
1142 {
1143 const struct em28xx_ops *ops = NULL;
1144
1145 dev_info(&dev->intf->dev, "Suspending extensions\n");
1146 mutex_lock(&em28xx_devlist_mutex);
1147 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1148 if (!ops->suspend)
1149 continue;
1150 ops->suspend(dev);
1151 if (dev->dev_next)
1152 ops->suspend(dev->dev_next);
1153 }
1154 mutex_unlock(&em28xx_devlist_mutex);
1155 return 0;
1156 }
1157
1158 int em28xx_resume_extension(struct em28xx *dev)
1159 {
1160 const struct em28xx_ops *ops = NULL;
1161
1162 dev_info(&dev->intf->dev, "Resuming extensions\n");
1163 mutex_lock(&em28xx_devlist_mutex);
1164 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1165 if (!ops->resume)
1166 continue;
1167 ops->resume(dev);
1168 if (dev->dev_next)
1169 ops->resume(dev->dev_next);
1170 }
1171 mutex_unlock(&em28xx_devlist_mutex);
1172 return 0;
1173 }
Kernel DRM miscellaneous fixes and cross-tree changes