?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
drm/tests: hdmi: Fix memory leaks in drm_display_mode_from_cea_vic()
[drm/drm-misc.git] / drivers / media / usb / gspca / w996Xcf.c
blob79baa0c1a031f46a67fcfc4b1cc933ddc40566b3
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip.
4 *
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the in kernel v4l1 w9968cf driver:
8 *
9 * Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it>
10 */
11
12 /* Note this is not a stand alone driver, it gets included in ov519.c, this
13 is a bit of a hack, but it needs the driver code for a lot of different
14 ov sensors which is already present in ov519.c (the old v4l1 driver used
15 the ovchipcam framework). When we have the time we really should move
16 the sensor drivers to v4l2 sub drivers, and properly split of this
17 driver from ov519.c */
18
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21 #define W9968CF_I2C_BUS_DELAY 4 /* delay in us for I2C bit r/w operations */
22
23 #define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET])
24 #define UV_QUANTABLE (&sd->jpeg_hdr[JPEG_QT1_OFFSET])
25
26 static const struct v4l2_pix_format w9968cf_vga_mode[] = {
27 {160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
28 .bytesperline = 160 * 2,
29 .sizeimage = 160 * 120 * 2,
30 .colorspace = V4L2_COLORSPACE_JPEG},
31 {176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
32 .bytesperline = 176 * 2,
33 .sizeimage = 176 * 144 * 2,
34 .colorspace = V4L2_COLORSPACE_JPEG},
35 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
36 .bytesperline = 320 * 2,
37 .sizeimage = 320 * 240 * 2,
38 .colorspace = V4L2_COLORSPACE_JPEG},
39 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
40 .bytesperline = 352 * 2,
41 .sizeimage = 352 * 288 * 2,
42 .colorspace = V4L2_COLORSPACE_JPEG},
43 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
44 .bytesperline = 640 * 2,
45 .sizeimage = 640 * 480 * 2,
46 .colorspace = V4L2_COLORSPACE_JPEG},
47 };
48
49 static void reg_w(struct sd *sd, u16 index, u16 value);
50
51 /*--------------------------------------------------------------------------
52 Write 64-bit data to the fast serial bus registers.
53 Return 0 on success, -1 otherwise.
54 --------------------------------------------------------------------------*/
55 static void w9968cf_write_fsb(struct sd *sd, u16* data)
56 {
57 struct usb_device *udev = sd->gspca_dev.dev;
58 u16 value;
59 int ret;
60
61 if (sd->gspca_dev.usb_err < 0)
62 return;
63
64 value = *data++;
65 memcpy(sd->gspca_dev.usb_buf, data, 6);
66
67 /* Avoid things going to fast for the bridge with a xhci host */
68 udelay(150);
69 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0,
70 USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
71 value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
72 if (ret < 0) {
73 pr_err("Write FSB registers failed (%d)\n", ret);
74 sd->gspca_dev.usb_err = ret;
75 }
76 }
77
78 /*--------------------------------------------------------------------------
79 Write data to the serial bus control register.
80 Return 0 on success, a negative number otherwise.
81 --------------------------------------------------------------------------*/
82 static void w9968cf_write_sb(struct sd *sd, u16 value)
83 {
84 int ret;
85
86 if (sd->gspca_dev.usb_err < 0)
87 return;
88
89 /* Avoid things going to fast for the bridge with a xhci host */
90 udelay(150);
91
92 /* We don't use reg_w here, as that would cause all writes when
93 bitbanging i2c to be logged, making the logs impossible to read */
94 ret = usb_control_msg(sd->gspca_dev.dev,
95 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
96 0,
97 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
98 value, 0x01, NULL, 0, 500);
99
100 udelay(W9968CF_I2C_BUS_DELAY);
101
102 if (ret < 0) {
103 pr_err("Write SB reg [01] %04x failed\n", value);
104 sd->gspca_dev.usb_err = ret;
105 }
106 }
107
108 /*--------------------------------------------------------------------------
109 Read data from the serial bus control register.
110 Return 0 on success, a negative number otherwise.
111 --------------------------------------------------------------------------*/
112 static int w9968cf_read_sb(struct sd *sd)
113 {
114 int ret;
115
116 if (sd->gspca_dev.usb_err < 0)
117 return -1;
118
119 /* Avoid things going to fast for the bridge with a xhci host */
120 udelay(150);
121
122 /* We don't use reg_r here, as the w9968cf is special and has 16
123 bit registers instead of 8 bit */
124 ret = usb_control_msg(sd->gspca_dev.dev,
125 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
126 1,
127 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
128 0, 0x01, sd->gspca_dev.usb_buf, 2, 500);
129 if (ret >= 0) {
130 ret = sd->gspca_dev.usb_buf[0] |
131 (sd->gspca_dev.usb_buf[1] << 8);
132 } else {
133 pr_err("Read SB reg [01] failed\n");
134 sd->gspca_dev.usb_err = ret;
135 /*
136 * Make sure the buffer is zeroed to avoid uninitialized
137 * values.
138 */
139 memset(sd->gspca_dev.usb_buf, 0, 2);
140 }
141
142 udelay(W9968CF_I2C_BUS_DELAY);
143
144 return ret;
145 }
146
147 /*--------------------------------------------------------------------------
148 Upload quantization tables for the JPEG compression.
149 This function is called by w9968cf_start_transfer().
150 Return 0 on success, a negative number otherwise.
151 --------------------------------------------------------------------------*/
152 static void w9968cf_upload_quantizationtables(struct sd *sd)
153 {
154 u16 a, b;
155 int i, j;
156
157 reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
158
159 for (i = 0, j = 0; i < 32; i++, j += 2) {
160 a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j + 1]) << 8);
161 b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j + 1]) << 8);
162 reg_w(sd, 0x40 + i, a);
163 reg_w(sd, 0x60 + i, b);
164 }
165 reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
166 }
167
168 /****************************************************************************
169 * Low-level I2C I/O functions. *
170 * The adapter supports the following I2C transfer functions: *
171 * i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only) *
172 * i2c_adap_read_byte_data() *
173 * i2c_adap_read_byte() *
174 ****************************************************************************/
175
176 static void w9968cf_smbus_start(struct sd *sd)
177 {
178 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
179 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
180 }
181
182 static void w9968cf_smbus_stop(struct sd *sd)
183 {
184 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
185 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
186 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
187 }
188
189 static void w9968cf_smbus_write_byte(struct sd *sd, u8 v)
190 {
191 u8 bit;
192 int sda;
193
194 for (bit = 0 ; bit < 8 ; bit++) {
195 sda = (v & 0x80) ? 2 : 0;
196 v <<= 1;
197 /* SDE=1, SDA=sda, SCL=0 */
198 w9968cf_write_sb(sd, 0x10 | sda);
199 /* SDE=1, SDA=sda, SCL=1 */
200 w9968cf_write_sb(sd, 0x11 | sda);
201 /* SDE=1, SDA=sda, SCL=0 */
202 w9968cf_write_sb(sd, 0x10 | sda);
203 }
204 }
205
206 static void w9968cf_smbus_read_byte(struct sd *sd, u8 *v)
207 {
208 u8 bit;
209
210 /* No need to ensure SDA is high as we are always called after
211 read_ack which ends with SDA high */
212 *v = 0;
213 for (bit = 0 ; bit < 8 ; bit++) {
214 *v <<= 1;
215 /* SDE=1, SDA=1, SCL=1 */
216 w9968cf_write_sb(sd, 0x0013);
217 *v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0;
218 /* SDE=1, SDA=1, SCL=0 */
219 w9968cf_write_sb(sd, 0x0012);
220 }
221 }
222
223 static void w9968cf_smbus_write_nack(struct sd *sd)
224 {
225 /* No need to ensure SDA is high as we are always called after
226 read_byte which ends with SDA high */
227 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
228 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
229 }
230
231 static void w9968cf_smbus_read_ack(struct sd *sd)
232 {
233 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
234 int sda;
235
236 /* Ensure SDA is high before raising clock to avoid a spurious stop */
237 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
238 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
239 sda = w9968cf_read_sb(sd);
240 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
241 if (sda >= 0 && (sda & 0x08)) {
242 gspca_dbg(gspca_dev, D_USBI, "Did not receive i2c ACK\n");
243 sd->gspca_dev.usb_err = -EIO;
244 }
245 }
246
247 /* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */
248 static void w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value)
249 {
250 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
251 u16* data = (u16 *)sd->gspca_dev.usb_buf;
252
253 data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0);
254 data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0;
255 data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0);
256 data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0;
257 data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0;
258 data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0);
259 data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0;
260 data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0;
261 data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0);
262 data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0;
263
264 w9968cf_write_fsb(sd, data);
265
266 data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0);
267 data[0] |= (reg & 0x40) ? 0x0540 : 0x0;
268 data[0] |= (reg & 0x20) ? 0x5000 : 0x0;
269 data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0);
270 data[1] |= (reg & 0x10) ? 0x0054 : 0x0;
271 data[1] |= (reg & 0x08) ? 0x1500 : 0x0;
272 data[1] |= (reg & 0x04) ? 0x4000 : 0x0;
273 data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0);
274 data[2] |= (reg & 0x02) ? 0x0150 : 0x0;
275 data[2] |= (reg & 0x01) ? 0x5400 : 0x0;
276 data[3] = 0x001d;
277
278 w9968cf_write_fsb(sd, data);
279
280 data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0);
281 data[0] |= (value & 0x40) ? 0x0540 : 0x0;
282 data[0] |= (value & 0x20) ? 0x5000 : 0x0;
283 data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0);
284 data[1] |= (value & 0x10) ? 0x0054 : 0x0;
285 data[1] |= (value & 0x08) ? 0x1500 : 0x0;
286 data[1] |= (value & 0x04) ? 0x4000 : 0x0;
287 data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0);
288 data[2] |= (value & 0x02) ? 0x0150 : 0x0;
289 data[2] |= (value & 0x01) ? 0x5400 : 0x0;
290 data[3] = 0xfe1d;
291
292 w9968cf_write_fsb(sd, data);
293
294 gspca_dbg(gspca_dev, D_USBO, "i2c 0x%02x -> [0x%02x]\n", value, reg);
295 }
296
297 /* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */
298 static int w9968cf_i2c_r(struct sd *sd, u8 reg)
299 {
300 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
301 int ret = 0;
302 u8 value;
303
304 /* Fast serial bus data control disable */
305 w9968cf_write_sb(sd, 0x0013); /* don't change ! */
306
307 w9968cf_smbus_start(sd);
308 w9968cf_smbus_write_byte(sd, sd->sensor_addr);
309 w9968cf_smbus_read_ack(sd);
310 w9968cf_smbus_write_byte(sd, reg);
311 w9968cf_smbus_read_ack(sd);
312 w9968cf_smbus_stop(sd);
313 w9968cf_smbus_start(sd);
314 w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1);
315 w9968cf_smbus_read_ack(sd);
316 w9968cf_smbus_read_byte(sd, &value);
317 /* signal we don't want to read anymore, the v4l1 driver used to
318 send an ack here which is very wrong! (and then fixed
319 the issues this gave by retrying reads) */
320 w9968cf_smbus_write_nack(sd);
321 w9968cf_smbus_stop(sd);
322
323 /* Fast serial bus data control re-enable */
324 w9968cf_write_sb(sd, 0x0030);
325
326 if (sd->gspca_dev.usb_err >= 0) {
327 ret = value;
328 gspca_dbg(gspca_dev, D_USBI, "i2c [0x%02X] -> 0x%02X\n",
329 reg, value);
330 } else
331 gspca_err(gspca_dev, "i2c read [0x%02x] failed\n", reg);
332
333 return ret;
334 }
335
336 /*--------------------------------------------------------------------------
337 Turn on the LED on some webcams. A beep should be heard too.
338 Return 0 on success, a negative number otherwise.
339 --------------------------------------------------------------------------*/
340 static void w9968cf_configure(struct sd *sd)
341 {
342 reg_w(sd, 0x00, 0xff00); /* power-down */
343 reg_w(sd, 0x00, 0xbf17); /* reset everything */
344 reg_w(sd, 0x00, 0xbf10); /* normal operation */
345 reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
346 reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
347 reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
348 reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
349
350 sd->stopped = 1;
351 }
352
353 static void w9968cf_init(struct sd *sd)
354 {
355 unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2),
356 y0 = 0x0000,
357 u0 = y0 + hw_bufsize / 2,
358 v0 = u0 + hw_bufsize / 4,
359 y1 = v0 + hw_bufsize / 4,
360 u1 = y1 + hw_bufsize / 2,
361 v1 = u1 + hw_bufsize / 4;
362
363 reg_w(sd, 0x00, 0xff00); /* power off */
364 reg_w(sd, 0x00, 0xbf10); /* power on */
365
366 reg_w(sd, 0x03, 0x405d); /* DRAM timings */
367 reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
368
369 reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
370 reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */
371 reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
372 reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */
373 reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
374 reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */
375
376 reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
377 reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */
378 reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
379 reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */
380 reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
381 reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */
382
383 reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
384 reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */
385
386 reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
387 reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */
388
389 reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
390 reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
391 reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
392 reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
393 }
394
395 static void w9968cf_set_crop_window(struct sd *sd)
396 {
397 int start_cropx, start_cropy, x, y, fw, fh, cw, ch,
398 max_width, max_height;
399
400 if (sd->sif) {
401 max_width = 352;
402 max_height = 288;
403 } else {
404 max_width = 640;
405 max_height = 480;
406 }
407
408 if (sd->sensor == SEN_OV7620) {
409 /*
410 * Sigh, this is dependend on the clock / framerate changes
411 * made by the frequency control, sick.
412 *
413 * Note we cannot use v4l2_ctrl_g_ctrl here, as we get called
414 * from ov519.c:setfreq() with the ctrl lock held!
415 */
416 if (sd->freq->val == 1) {
417 start_cropx = 277;
418 start_cropy = 37;
419 } else {
420 start_cropx = 105;
421 start_cropy = 37;
422 }
423 } else {
424 start_cropx = 320;
425 start_cropy = 35;
426 }
427
428 /* Work around to avoid FP arithmetic */
429 #define SC(x) ((x) << 10)
430
431 /* Scaling factors */
432 fw = SC(sd->gspca_dev.pixfmt.width) / max_width;
433 fh = SC(sd->gspca_dev.pixfmt.height) / max_height;
434
435 cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.pixfmt.width) / fh;
436 ch = (fw >= fh) ? SC(sd->gspca_dev.pixfmt.height) / fw : max_height;
437
438 sd->sensor_width = max_width;
439 sd->sensor_height = max_height;
440
441 x = (max_width - cw) / 2;
442 y = (max_height - ch) / 2;
443
444 reg_w(sd, 0x10, start_cropx + x);
445 reg_w(sd, 0x11, start_cropy + y);
446 reg_w(sd, 0x12, start_cropx + x + cw);
447 reg_w(sd, 0x13, start_cropy + y + ch);
448 }
449
450 static void w9968cf_mode_init_regs(struct sd *sd)
451 {
452 int val, vs_polarity, hs_polarity;
453
454 w9968cf_set_crop_window(sd);
455
456 reg_w(sd, 0x14, sd->gspca_dev.pixfmt.width);
457 reg_w(sd, 0x15, sd->gspca_dev.pixfmt.height);
458
459 /* JPEG width & height */
460 reg_w(sd, 0x30, sd->gspca_dev.pixfmt.width);
461 reg_w(sd, 0x31, sd->gspca_dev.pixfmt.height);
462
463 /* Y & UV frame buffer strides (in WORD) */
464 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
465 V4L2_PIX_FMT_JPEG) {
466 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width / 2);
467 reg_w(sd, 0x2d, sd->gspca_dev.pixfmt.width / 4);
468 } else
469 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width);
470
471 reg_w(sd, 0x00, 0xbf17); /* reset everything */
472 reg_w(sd, 0x00, 0xbf10); /* normal operation */
473
474 /* Transfer size in WORDS (for UYVY format only) */
475 val = sd->gspca_dev.pixfmt.width * sd->gspca_dev.pixfmt.height;
476 reg_w(sd, 0x3d, val & 0xffff); /* low bits */
477 reg_w(sd, 0x3e, val >> 16); /* high bits */
478
479 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
480 V4L2_PIX_FMT_JPEG) {
481 /* We may get called multiple times (usb isoc bw negotiat.) */
482 jpeg_define(sd->jpeg_hdr, sd->gspca_dev.pixfmt.height,
483 sd->gspca_dev.pixfmt.width, 0x22); /* JPEG 420 */
484 jpeg_set_qual(sd->jpeg_hdr, v4l2_ctrl_g_ctrl(sd->jpegqual));
485 w9968cf_upload_quantizationtables(sd);
486 v4l2_ctrl_grab(sd->jpegqual, true);
487 }
488
489 /* Video Capture Control Register */
490 if (sd->sensor == SEN_OV7620) {
491 /* Seems to work around a bug in the image sensor */
492 vs_polarity = 1;
493 hs_polarity = 1;
494 } else {
495 vs_polarity = 1;
496 hs_polarity = 0;
497 }
498
499 val = (vs_polarity << 12) | (hs_polarity << 11);
500
501 /* NOTE: We may not have enough memory to do double buffering while
502 doing compression (amount of memory differs per model cam).
503 So we use the second image buffer also as jpeg stream buffer
504 (see w9968cf_init), and disable double buffering. */
505 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
506 V4L2_PIX_FMT_JPEG) {
507 /* val |= 0x0002; YUV422P */
508 val |= 0x0003; /* YUV420P */
509 } else
510 val |= 0x0080; /* Enable HW double buffering */
511
512 /* val |= 0x0020; enable clamping */
513 /* val |= 0x0008; enable (1-2-1) filter */
514 /* val |= 0x000c; enable (2-3-6-3-2) filter */
515
516 val |= 0x8000; /* capt. enable */
517
518 reg_w(sd, 0x16, val);
519
520 sd->gspca_dev.empty_packet = 0;
521 }
522
523 static void w9968cf_stop0(struct sd *sd)
524 {
525 v4l2_ctrl_grab(sd->jpegqual, false);
526 reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
527 reg_w(sd, 0x16, 0x0000); /* stop video capture */
528 }
529
530 /* The w9968cf docs say that a 0 sized packet means EOF (and also SOF
531 for the next frame). This seems to simply not be true when operating
532 in JPEG mode, in this case there may be empty packets within the
533 frame. So in JPEG mode use the JPEG SOI marker to detect SOF.
534
535 Note to make things even more interesting the w9968cf sends *PLANAR* jpeg,
536 to be precise it sends: SOI, SOF, DRI, SOS, Y-data, SOS, U-data, SOS,
537 V-data, EOI. */
538 static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev,
539 u8 *data, /* isoc packet */
540 int len) /* iso packet length */
541 {
542 struct sd *sd = (struct sd *) gspca_dev;
543
544 if (w9968cf_vga_mode[gspca_dev->curr_mode].pixelformat ==
545 V4L2_PIX_FMT_JPEG) {
546 if (len >= 2 &&
547 data[0] == 0xff &&
548 data[1] == 0xd8) {
549 gspca_frame_add(gspca_dev, LAST_PACKET,
550 NULL, 0);
551 gspca_frame_add(gspca_dev, FIRST_PACKET,
552 sd->jpeg_hdr, JPEG_HDR_SZ);
553 /* Strip the ff d8, our own header (which adds
554 huffman and quantization tables) already has this */
555 len -= 2;
556 data += 2;
557 }
558 } else {
559 /* In UYVY mode an empty packet signals EOF */
560 if (gspca_dev->empty_packet) {
561 gspca_frame_add(gspca_dev, LAST_PACKET,
562 NULL, 0);
563 gspca_frame_add(gspca_dev, FIRST_PACKET,
564 NULL, 0);
565 gspca_dev->empty_packet = 0;
566 }
567 }
568 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
569 }
Kernel DRM miscellaneous fixes and cross-tree changes