1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Serial ATA AHCI controllers
10 - Hans de Goede <hdegoede@redhat.com>
11 - Damien Le Moal <dlemoal@kernel.org>
14 This document defines device tree properties for a common AHCI SATA
15 controller implementation. It's hardware interface is supposed to
16 conform to the technical standard defined by Intel (see Serial ATA
17 Advanced Host Controller Interface specification for details). The
18 document doesn't constitute a DT-node binding by itself but merely
19 defines a set of common properties for the AHCI-compatible devices.
24 - $ref: sata-common.yaml#
29 Generic AHCI registers space conforming to the Serial ATA AHCI
33 description: CSR space IDs
39 Generic AHCI state change interrupt. Can be implemented either as a
40 single line attached to the controller or as a set of the signals
41 indicating the particular port events.
46 description: Power regulator for AHCI controller
49 description: Power regulator for SATA target device
52 description: Power regulator for SATA PHY
55 description: Reference to the SATA PHY node
62 $ref: /schemas/types.yaml#/definitions/uint32
64 Bitfield of the HBA generic platform capabilities like Staggered
65 Spin-up or Mechanical Presence Switch support. It can be used to
66 appropriately initialize the HWinit fields of the HBA CAP register
67 in case if the system firmware hasn't done it.
70 $ref: /schemas/types.yaml#/definitions/uint32
72 Mask that indicates which ports the HBA supports. Useful if PI is not
73 programmed by the BIOS, which is true for some embedded SoC's.
76 "^sata-port@[0-9a-f]+$":
77 $ref: '#/$defs/ahci-port'
79 It is optionally possible to describe the ports as sub-nodes so
80 to enable each port independently when dealing with multiple PHYs.
86 additionalProperties: true
90 $ref: /schemas/ata/sata-common.yaml#/$defs/sata-port
95 AHCI SATA port identifier. By design AHCI controller can't have
96 more than 32 ports due to the CAP.NP fields and PI register size
102 description: Individual AHCI SATA port PHY
106 description: AHCI SATA port PHY ID
110 description: Power regulator for SATA port target device
113 $ref: /schemas/types.yaml#/definitions/uint32
115 Bitfield of the HBA port-specific platform capabilities like Hot
116 plugging, eSATA, FIS-based Switching, etc (see AHCI specification
117 for details). It can be used to initialize the HWinit fields of
118 the PxCMD register in case if the system firmware hasn't done it.