1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AHCI SATA Controller
10 SATA nodes are defined to describe on-chip Serial ATA controllers.
11 Each SATA controller should have its own node.
13 It is possible, but not required, to represent each port as a sub-node.
14 It allows to enable each port independently when dealing with multiple
18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>
27 - cavium,octeon-7130-ahci
30 - marvell,armada-3700-ahci
31 - marvell,armada-8k-ahci
32 - marvell,berlin2q-ahci
35 - socionext,uniphier-pro4-ahci
36 - socionext,uniphier-pxs2-ahci
37 - socionext,uniphier-pxs3-ahci
47 - marvell,armada-8k-ahci
48 - marvell,berlin2-ahci
49 - marvell,berlin2q-ahci
52 - socionext,uniphier-pro4-ahci
53 - socionext,uniphier-pxs2-ahci
54 - socionext,uniphier-pxs3-ahci
57 - cavium,octeon-7130-ahci
60 - marvell,armada-3700-ahci
91 "^sata-port@[0-9a-f]+$":
92 $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
96 - required: [ target-supply ]
98 unevaluatedProperties: false
106 - $ref: ahci-common.yaml#
136 const: socionext,uniphier-pro4-ahci
141 - description: reset line for the parent
142 - description: reset line for the glue logic
143 - description: reset line for the controller
152 - socionext,uniphier-pxs2-ahci
153 - socionext,uniphier-pxs3-ahci
158 - description: reset for the glue logic
159 - description: reset for the controller
167 unevaluatedProperties: false
172 compatible = "snps,spear-ahci";
173 reg = <0xffe08000 0x1000>;
177 #include <dt-bindings/interrupt-controller/arm-gic.h>
178 #include <dt-bindings/clock/berlin2q.h>
179 #include <dt-bindings/ata/ahci.h>
182 compatible = "marvell,berlin2q-ahci", "generic-ahci";
183 reg = <0xf7e90000 0x1000>;
184 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
185 clocks = <&chip CLKID_SATA>;
186 #address-cells = <1>;
189 hba-cap = <HBA_SMPS>;
194 phys = <&sata_phy 0>;
195 target-supply = <®_sata0>;
197 hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
203 phys = <&sata_phy 1>;
204 target-supply = <®_sata1>;
206 hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;