Documentation/devicetree/bindings/display/st,stm32mp25-lvds.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/st,stm32mp25-lvds.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: STMicroelectronics STM32 LVDS Display Interface Transmitter
   8
   9 maintainers:
  10   - Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
  11   - Yannick Fertre <yannick.fertre@foss.st.com>
  12
  13 description: |
  14   The STMicroelectronics STM32 LVDS Display Interface Transmitter handles the
  15   LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC)
  16   onto the LVDS PHY.
  17
  18   It is composed of three sub blocks:
  19     - LVDS host: handles the LVDS protocol (FPD / OpenLDI) and maps its input
  20       pixels onto the data lanes of the PHY
  21     - LVDS PHY: parallelize the data and drives the LVDS data lanes
  22     - LVDS wrapper: handles top-level settings
  23
  24   The LVDS controller driver supports the following high-level features:
  25     - FDP-Link-I and OpenLDI (v0.95) protocols
  26     - Single-Link or Dual-Link operation
  27     - Single-Display or Double-Display (with the same content duplicated on both)
  28     - Flexible Bit-Mapping, including JEIDA and VESA
  29     - RGB888 or RGB666 output
  30     - Synchronous design, with one input pixel per clock cycle
  31
  32 properties:
  33   compatible:
  34     const: st,stm32mp25-lvds
  35
  36   "#clock-cells":
  37     const: 0
  38     description:
  39       Provides the internal LVDS PHY clock to the framework.
  40
  41   reg:
  42     maxItems: 1
  43
  44   clocks:
  45     items:
  46       - description: APB peripheral clock
  47       - description: Reference clock for the internal PLL
  48
  49   clock-names:
  50     items:
  51       - const: pclk
  52       - const: ref
  53
  54   resets:
  55     maxItems: 1
  56
  57   ports:
  58     $ref: /schemas/graph.yaml#/properties/ports
  59
  60     properties:
  61       port@0:
  62         $ref: /schemas/graph.yaml#/properties/port
  63         description:
  64           LVDS input port node, connected to the LTDC RGB output port.
  65
  66       port@1:
  67         $ref: /schemas/graph.yaml#/properties/port
  68         description:
  69           LVDS output port node, connected to a panel or bridge input port.
  70
  71     required:
  72       - port@0
  73       - port@1
  74
  75 required:
  76   - compatible
  77   - "#clock-cells"
  78   - reg
  79   - clocks
  80   - clock-names
  81   - resets
  82   - ports
  83
  84 additionalProperties: false
  85
  86 examples:
  87   - |
  88     #include <dt-bindings/clock/st,stm32mp25-rcc.h>
  89     #include <dt-bindings/reset/st,stm32mp25-rcc.h>
  90
  91     lvds: lvds@48060000 {
  92         compatible = "st,stm32mp25-lvds";
  93         reg = <0x48060000 0x2000>;
  94         #clock-cells = <0>;
  95         clocks = <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>;
  96         clock-names = "pclk", "ref";
  97         resets = <&rcc LVDS_R>;
  98
  99         ports {
 100             #address-cells = <1>;
 101             #size-cells = <0>;
 102
 103             port@0 {
 104                 reg = <0>;
 105                 lvds_in: endpoint {
 106                    remote-endpoint = <&ltdc_ep1_out>;
 107                 };
 108             };
 109
 110             port@1 {
 111                 reg = <1>;
 112                 lvds_out0: endpoint {
 113                    remote-endpoint = <&lvds_panel_in>;
 114                 };
 115             };
 116         };
 117     };
 118
 119 ...