1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Aspeed SGPIO controller
10 - Andrew Jeffery <andrew@aj.id.au>
13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
16 GPIO pins can be programmed to support the following options
17 - Support interrupt option for each input port and various interrupt
18 sensitivity option (level-high, level-low, edge-high, edge-low)
19 - Support reset tolerance option for each output port
20 - Directly connected to APB bus and its shift clock is from APB bus clock
21 divided by a programmable value.
22 - Co-work with external signal-chained TTL components (74LV165/74LV595)
27 - aspeed,ast2400-sgpio
28 - aspeed,ast2500-sgpio
29 - aspeed,ast2600-sgpiom
36 # Each SGPIO is represented as a pair of input and output GPIOs
47 interrupt-controller: true
65 - interrupt-controller
71 additionalProperties: false
75 #include <dt-bindings/clock/aspeed-clock.h>
76 sgpio: sgpio@1e780200 {
78 compatible = "aspeed,ast2500-sgpio";
81 reg = <0x1e780200 0x0100>;
82 clocks = <&syscon ASPEED_CLK_APB>;
84 #interrupt-cells = <2>;
86 bus-frequency = <12000000>;