1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCF857x-compatible I/O expanders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14 driven high by a pull-up current source or driven low to ground. This
15 combines the direction and output level into a single bit per line, which
16 can't be read back. We can't actually know at initialization time whether a
17 line is configured (a) as output and driving the signal low/high, or (b) as
18 input and reporting a low/high value, without knowing the last value written
19 since the chip came out of reset (if any). The only reliable solution for
20 setting up line direction is thus to do it explicitly.
51 The first cell is the GPIO number and the second cell specifies GPIO
52 flags, as defined in <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH
53 and GPIO_ACTIVE_LOW flags are supported.
56 $ref: /schemas/types.yaml#/definitions/uint32
58 Bitmask that specifies the initial state of each line.
59 When a bit is set to zero, the corresponding line will be initialized to
60 the input (pulled-up) state.
61 When the bit is set to one, the line will be initialized to the
62 low-level output state.
63 If the property is not specified all lines will be initialized to the
69 interrupt-controller: true
77 "^(.+-hog(-[0-9]+)?)$":
89 additionalProperties: false
98 compatible = "nxp,pcf8575";
100 interrupt-parent = <&irqpin2>;
104 interrupt-controller;
105 #interrupt-cells = <2>;