Documentation/devicetree/bindings/i2c/renesas,riic.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
   8
   9 maintainers:
  10   - Chris Brandt <chris.brandt@renesas.com>
  11   - Wolfram Sang <wsa+renesas@sang-engineering.com>
  12
  13 allOf:
  14   - $ref: /schemas/i2c/i2c-controller.yaml#
  15
  16 properties:
  17   compatible:
  18     oneOf:
  19       - items:
  20           - enum:
  21               - renesas,riic-r7s72100   # RZ/A1H
  22               - renesas,riic-r7s9210    # RZ/A2M
  23               - renesas,riic-r9a07g043  # RZ/G2UL and RZ/Five
  24               - renesas,riic-r9a07g044  # RZ/G2{L,LC}
  25               - renesas,riic-r9a07g054  # RZ/V2L
  26           - const: renesas,riic-rz      # RZ/A or RZ/G2L
  27
  28       - items:
  29           - const: renesas,riic-r9a08g045   # RZ/G3S
  30           - const: renesas,riic-r9a09g057   # RZ/V2H(P)
  31
  32       - const: renesas,riic-r9a09g057   # RZ/V2H(P)
  33
  34   reg:
  35     maxItems: 1
  36
  37   interrupts:
  38     items:
  39       - description: Transmit End Interrupt
  40       - description: Receive Data Full Interrupt
  41       - description: Transmit Data Empty Interrupt
  42       - description: Stop Condition Detection Interrupt
  43       - description: Start Condition Detection Interrupt
  44       - description: NACK Reception Interrupt
  45       - description: Arbitration-Lost Interrupt
  46       - description: Timeout Interrupt
  47
  48   interrupt-names:
  49     items:
  50       - const: tei
  51       - const: ri
  52       - const: ti
  53       - const: spi
  54       - const: sti
  55       - const: naki
  56       - const: ali
  57       - const: tmoi
  58
  59   clock-frequency:
  60     description:
  61       Desired I2C bus clock frequency in Hz. The absence of this property
  62       indicates the default frequency 100 kHz.
  63
  64   clocks:
  65     maxItems: 1
  66
  67   power-domains:
  68     maxItems: 1
  69
  70   resets:
  71     maxItems: 1
  72
  73 required:
  74   - compatible
  75   - reg
  76   - interrupts
  77   - interrupt-names
  78   - clocks
  79   - clock-frequency
  80   - power-domains
  81   - '#address-cells'
  82   - '#size-cells'
  83
  84 if:
  85   properties:
  86     compatible:
  87       contains:
  88         enum:
  89           - renesas,riic-r9a07g043
  90           - renesas,riic-r9a07g044
  91           - renesas,riic-r9a07g054
  92 then:
  93   required:
  94     - resets
  95
  96 unevaluatedProperties: false
  97
  98 examples:
  99   - |
 100     #include <dt-bindings/clock/r7s72100-clock.h>
 101     #include <dt-bindings/interrupt-controller/arm-gic.h>
 102
 103     i2c0: i2c@fcfee000 {
 104         compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
 105         reg = <0xfcfee000 0x44>;
 106         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
 107                      <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
 108                      <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
 109                      <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
 110                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
 111                      <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
 112                      <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
 113                      <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 114         interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
 115                           "tmoi";
 116         clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
 117         clock-frequency = <100000>;
 118         power-domains = <&cpg_clocks>;
 119         #address-cells = <1>;
 120         #size-cells = <0>;
 121     };