1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM660 Network-On-Chip interconnect
10 - Konrad Dybcio <konradybcio@kernel.org>
13 The Qualcomm SDM660 interconnect providers support adjusting the
14 bandwidth requirements between the various NoC fabrics.
41 unevaluatedProperties: false
44 - $ref: qcom,rpm-common.yaml#
48 const: qcom,sdm660-mnoc
54 - description: CPU-NoC High-performance Bus Clock.
62 const: qcom,sdm660-a2noc
68 - description: IPA Clock.
69 - description: UFS AXI Clock.
70 - description: Aggregate2 UFS AXI Clock.
71 - description: Aggregate2 USB3 AXI Clock.
72 - description: Config NoC USB2 AXI Clock.
78 - const: aggre2_ufs_axi
79 - const: aggre2_usb3_axi
80 - const: cfg_noc_usb2_axi
84 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
85 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
86 #include <dt-bindings/clock/qcom,rpmcc.h>
88 bimc: interconnect@1008000 {
89 compatible = "qcom,sdm660-bimc";
90 reg = <0x01008000 0x78000>;
91 #interconnect-cells = <1>;
94 a2noc: interconnect@1704000 {
95 compatible = "qcom,sdm660-a2noc";
96 reg = <0x01704000 0xc100>;
97 #interconnect-cells = <1>;
98 clocks = <&rpmcc RPM_SMD_IPA_CLK>,
99 <&gcc GCC_UFS_AXI_CLK>,
100 <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
101 <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
102 <&gcc GCC_CFG_NOC_USB2_AXI_CLK>;