1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 MIPI CSI-2
10 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
15 - const: allwinner,sun6i-a31-mipi-csi2
17 - const: allwinner,sun8i-v3s-mipi-csi2
18 - const: allwinner,sun6i-a31-mipi-csi2
28 - description: Bus Clock
29 - description: Module Clock
38 description: MIPI D-PHY
48 $ref: /schemas/graph.yaml#/properties/ports
52 $ref: /schemas/graph.yaml#/$defs/port-base
53 description: Input port, connect to a MIPI CSI-2 sensor
60 $ref: video-interfaces.yaml#
61 unevaluatedProperties: false
71 unevaluatedProperties: false
74 $ref: /schemas/graph.yaml#/properties/port
75 description: Output port, connect to a CSI controller
92 additionalProperties: false
96 #include <dt-bindings/interrupt-controller/arm-gic.h>
97 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
98 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
100 mipi_csi2: csi@1cb1000 {
101 compatible = "allwinner,sun8i-v3s-mipi-csi2",
102 "allwinner,sun6i-a31-mipi-csi2";
103 reg = <0x01cb1000 0x1000>;
104 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
105 clocks = <&ccu CLK_BUS_CSI>,
106 <&ccu CLK_CSI1_SCLK>;
107 clock-names = "bus", "mod";
108 resets = <&ccu RST_BUS_CSI>;
114 #address-cells = <1>;
117 mipi_csi2_in: port@0 {
120 mipi_csi2_in_ov5648: endpoint {
121 data-lanes = <1 2 3 4>;
123 remote-endpoint = <&ov5648_out_mipi_csi2>;
127 mipi_csi2_out: port@1 {
130 mipi_csi2_out_csi0: endpoint {
131 remote-endpoint = <&csi0_in_mipi_csi2>;