1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8250 Venus video encode and decode accelerators
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
13 The Venus IP is a video encode and decode accelerator present
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sm8250-venus
54 operating-points-v2: true
76 additionalProperties: false
88 additionalProperties: false
101 unevaluatedProperties: false
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 #include <dt-bindings/clock/qcom,videocc-sm8250.h>
107 #include <dt-bindings/interconnect/qcom,sm8250.h>
108 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
109 #include <dt-bindings/power/qcom,rpmhpd.h>
111 venus: video-codec@aa00000 {
112 compatible = "qcom,sm8250-venus";
113 reg = <0x0aa00000 0xff000>;
114 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
115 power-domains = <&videocc MVS0C_GDSC>,
116 <&videocc MVS0_GDSC>,
118 power-domain-names = "venus", "vcodec0", "mx";
120 clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
121 <&videocc VIDEO_CC_MVS0C_CLK>,
122 <&videocc VIDEO_CC_MVS0_CLK>;
123 clock-names = "iface", "core", "vcodec0_core";
125 interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
126 <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
127 interconnect-names = "cpu-cfg", "video-mem";
129 iommus = <&apps_smmu 0x2100 0x0400>;
130 memory-region = <&video_mem>;
132 resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
133 <&videocc VIDEO_CC_MVS0C_CLK_ARES>;
134 reset-names = "bus", "core";
137 compatible = "venus-decoder";
141 compatible = "venus-encoder";