1 # SPDX-License-Identifier: GPL-2.0-only
2 # Copyright (C) 2020 Renesas Electronics Corp.
5 $id: http://devicetree.org/schemas/media/renesas,vin.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
17 Each VIN instance has a single parallel input that supports RGB and YUV video,
18 with both external synchronization and BT.656 synchronization for the latter.
19 Depending on the instance the VIN input is connected to external SoC pins, or
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
27 - renesas,vin-r8a7742 # RZ/G1H
28 - renesas,vin-r8a7743 # RZ/G1M
29 - renesas,vin-r8a7744 # RZ/G1N
30 - renesas,vin-r8a7745 # RZ/G1E
31 - renesas,vin-r8a77470 # RZ/G1C
32 - renesas,vin-r8a7790 # R-Car H2
33 - renesas,vin-r8a7791 # R-Car M2-W
34 - renesas,vin-r8a7792 # R-Car V2H
35 - renesas,vin-r8a7793 # R-Car M2-N
36 - renesas,vin-r8a7794 # R-Car E2
37 - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1
41 - renesas,vin-r8a774a1 # RZ/G2M
42 - renesas,vin-r8a774b1 # RZ/G2N
43 - renesas,vin-r8a774c0 # RZ/G2E
44 - renesas,vin-r8a774e1 # RZ/G2H
45 - renesas,vin-r8a7778 # R-Car M1
46 - renesas,vin-r8a7779 # R-Car H1
47 - renesas,vin-r8a7795 # R-Car H3
48 - renesas,vin-r8a7796 # R-Car M3-W
49 - renesas,vin-r8a77961 # R-Car M3-W+
50 - renesas,vin-r8a77965 # R-Car M3-N
51 - renesas,vin-r8a77970 # R-Car V3M
52 - renesas,vin-r8a77980 # R-Car V3H
53 - renesas,vin-r8a77990 # R-Car E3
54 - renesas,vin-r8a77995 # R-Car D3
57 - renesas,vin-r8a779a0 # R-Car V3U
58 - renesas,vin-r8a779g0 # R-Car V4H
59 - renesas,vin-r8a779h0 # R-Car V4M
60 - const: renesas,rcar-gen4-vin # Generic R-Car Gen4
77 # The per-board settings for Gen2 and RZ/G1 platforms:
79 $ref: /schemas/graph.yaml#/$defs/port-base
80 unevaluatedProperties: false
82 A node containing a parallel input
86 $ref: video-interfaces.yaml#
87 unevaluatedProperties: false
92 If both HSYNC and VSYNC polarities are not specified, embedded
93 synchronization is selected.
98 If both HSYNC and VSYNC polarities are not specified, embedded
99 synchronization is selected.
102 field-even-active: true
109 description: Polarity of CLKENB signal
116 # The per-board settings for Gen3 and RZ/G2 platforms:
118 description: VIN channel number
119 $ref: /schemas/types.yaml#/definitions/uint32
124 $ref: /schemas/graph.yaml#/properties/ports
128 $ref: /schemas/graph.yaml#/$defs/port-base
129 unevaluatedProperties: false
131 Input port node, single endpoint describing a parallel input source.
135 $ref: video-interfaces.yaml#
136 unevaluatedProperties: false
141 If both HSYNC and VSYNC polarities are not specified, embedded
142 synchronization is selected.
147 If both HSYNC and VSYNC polarities are not specified, embedded
148 synchronization is selected.
151 field-even-active: true
158 description: Polarity of CLKENB signal
166 $ref: /schemas/graph.yaml#/properties/port
168 Input port node, multiple endpoints describing all the R-Car CSI-2
169 modules connected the VIN.
173 $ref: /schemas/graph.yaml#/properties/endpoint
174 description: Endpoint connected to CSI20.
177 $ref: /schemas/graph.yaml#/properties/endpoint
178 description: Endpoint connected to CSI21.
181 $ref: /schemas/graph.yaml#/properties/endpoint
182 description: Endpoint connected to CSI40.
185 $ref: /schemas/graph.yaml#/properties/endpoint
186 description: Endpoint connected to CSI41.
199 $ref: /schemas/graph.yaml#/properties/port
201 Input port node, multiple endpoints describing all the R-Car ISP
202 modules connected the VIN.
206 $ref: /schemas/graph.yaml#/properties/endpoint
207 description: Endpoint connected to ISP0.
210 $ref: /schemas/graph.yaml#/properties/endpoint
211 description: Endpoint connected to ISP1.
214 $ref: /schemas/graph.yaml#/properties/endpoint
215 description: Endpoint connected to ISP2.
218 $ref: /schemas/graph.yaml#/properties/endpoint
219 description: Endpoint connected to ISP3.
235 - renesas,vin-r8a7778
236 - renesas,vin-r8a7779
246 - renesas,vin-r8a7778
247 - renesas,vin-r8a7779
248 - renesas,rcar-gen2-vin
257 additionalProperties: false
260 # Device node example for Gen2 platform
262 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
263 #include <dt-bindings/interrupt-controller/arm-gic.h>
264 #include <dt-bindings/power/r8a7790-sysc.h>
267 compatible = "renesas,vin-r8a7790",
268 "renesas,rcar-gen2-vin";
269 reg = <0xe6ef1000 0x1000>;
270 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
271 clocks = <&cpg CPG_MOD 810>;
272 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
277 remote-endpoint = <&adv7180>;
283 # Device node example for Gen3 platform with only CSI-2
285 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
286 #include <dt-bindings/interrupt-controller/arm-gic.h>
287 #include <dt-bindings/power/r8a7795-sysc.h>
289 vin0: video@e6ef0000 {
290 compatible = "renesas,vin-r8a7795";
291 reg = <0xe6ef0000 0x1000>;
292 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
293 clocks = <&cpg CPG_MOD 811>;
294 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
299 #address-cells = <1>;
303 #address-cells = <1>;
308 vin0csi20: endpoint@0 {
310 remote-endpoint = <&csi20vin0>;
312 vin0csi40: endpoint@2 {
314 remote-endpoint = <&csi40vin0>;
320 # Device node example for Gen3 platform with CSI-2 and parallel
322 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
323 #include <dt-bindings/interrupt-controller/arm-gic.h>
324 #include <dt-bindings/power/r8a77970-sysc.h>
326 vin2: video@e6ef2000 {
327 compatible = "renesas,vin-r8a77970";
328 reg = <0xe6ef2000 0x1000>;
329 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
330 clocks = <&cpg CPG_MOD 809>;
331 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
336 #address-cells = <1>;
343 remote-endpoint = <&adv7612_out>;
350 #address-cells = <1>;
355 vin2csi40: endpoint@2 {
357 remote-endpoint = <&csi40vin2>;