Documentation/devicetree/bindings/media/rockchip-rga.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/media/rockchip-rga.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Rockchip 2D raster graphic acceleration controller (RGA)
   8
   9 description:
  10   RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D
  11   graphics operations, such as point/line drawing, image scaling, rotation,
  12   BitBLT, alpha blending and image blur/sharpness.
  13
  14 maintainers:
  15   - Jacob Chen <jacob-chen@iotwrt.com>
  16   - Ezequiel Garcia <ezequiel@collabora.com>
  17
  18 properties:
  19   compatible:
  20     oneOf:
  21       - const: rockchip,rk3288-rga
  22       - const: rockchip,rk3399-rga
  23       - items:
  24           - enum:
  25               - rockchip,rk3228-rga
  26               - rockchip,rk3568-rga
  27               - rockchip,rk3588-rga
  28           - const: rockchip,rk3288-rga
  29
  30   reg:
  31     maxItems: 1
  32
  33   interrupts:
  34     maxItems: 1
  35
  36   clocks:
  37     maxItems: 3
  38
  39   clock-names:
  40     items:
  41       - const: aclk
  42       - const: hclk
  43       - const: sclk
  44
  45   power-domains:
  46     maxItems: 1
  47
  48   resets:
  49     maxItems: 3
  50
  51   reset-names:
  52     items:
  53       - const: core
  54       - const: axi
  55       - const: ahb
  56
  57 required:
  58   - compatible
  59   - reg
  60   - interrupts
  61   - clocks
  62   - clock-names
  63   - resets
  64   - reset-names
  65
  66 additionalProperties: false
  67
  68 examples:
  69   - |
  70     #include <dt-bindings/clock/rk3399-cru.h>
  71     #include <dt-bindings/interrupt-controller/arm-gic.h>
  72     #include <dt-bindings/power/rk3399-power.h>
  73     rga: rga@ff680000 {
  74       compatible = "rockchip,rk3399-rga";
  75       reg = <0xff680000 0x10000>;
  76       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
  77       clocks = <&cru ACLK_RGA>,
  78                <&cru HCLK_RGA>,
  79                <&cru SCLK_RGA_CORE>;
  80       clock-names = "aclk", "hclk", "sclk";
  81       power-domains = <&power RK3399_PD_RGA>;
  82       resets = <&cru SRST_RGA_CORE>,
  83                <&cru SRST_A_RGA>,
  84                <&cru SRST_H_RGA>;
  85       reset-names = "core", "axi", "ahb";
  86     };