1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G1 VPU codecs implemented on Rockchip SoCs
11 - Ezequiel Garcia <ezequiel@collabora.com>
14 Hantro G1 video encode and decode accelerators present on Rockchip SoCs.
27 - rockchip,rk3588-av1-vpu
32 - const: rockchip,rk3066-vpu
34 - const: rockchip,rk3228-vpu
35 - const: rockchip,rk3399-vpu
37 - const: rockchip,rk3588-vpu121
38 - const: rockchip,rk3568-vpu
78 - description: AXI reset line
79 - description: AXI bus interface unit reset line
80 - description: APB reset line
81 - description: APB bus interface unit reset line
91 additionalProperties: false
95 #include <dt-bindings/clock/rk3288-cru.h>
96 #include <dt-bindings/interrupt-controller/arm-gic.h>
97 #include <dt-bindings/power/rk3288-power.h>
99 vpu: video-codec@ff9a0000 {
100 compatible = "rockchip,rk3288-vpu";
101 reg = <0xff9a0000 0x800>;
102 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
103 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
104 interrupt-names = "vepu", "vdpu";
105 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
106 clock-names = "aclk", "hclk";
107 power-domains = <&power RK3288_PD_VIDEO>;