Documentation/devicetree/bindings/pci/altr,msi-controller.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 # Copyright (C) 2015, 2024, Intel Corporation
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/altr,msi-controller.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: Altera PCIe MSI controller
   9
  10 maintainers:
  11   - Matthew Gerlach <matthew.gerlach@linux.intel.com>
  12
  13 properties:
  14   compatible:
  15     enum:
  16       - altr,msi-1.0
  17
  18   reg:
  19     items:
  20       - description: CSR registers
  21       - description: Vectors slave port region
  22
  23   reg-names:
  24     items:
  25       - const: csr
  26       - const: vector_slave
  27
  28   interrupts:
  29     maxItems: 1
  30
  31   msi-controller: true
  32
  33   num-vectors:
  34     description: number of vectors
  35     $ref: /schemas/types.yaml#/definitions/uint32
  36     minimum: 1
  37     maximum: 32
  38
  39 required:
  40   - compatible
  41   - reg
  42   - reg-names
  43   - interrupts
  44   - msi-controller
  45   - num-vectors
  46
  47 allOf:
  48   - $ref: /schemas/interrupt-controller/msi-controller.yaml#
  49
  50 unevaluatedProperties: false
  51
  52 examples:
  53   - |
  54     #include <dt-bindings/interrupt-controller/arm-gic.h>
  55     #include <dt-bindings/interrupt-controller/irq.h>
  56     msi@ff200000 {
  57         compatible = "altr,msi-1.0";
  58         reg = <0xff200000 0x00000010>,
  59               <0xff200010 0x00000080>;
  60         reg-names = "csr", "vector_slave";
  61         interrupt-parent = <&hps_0_arm_gic_0>;
  62         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
  63         msi-controller;
  64         num-vectors = <32>;
  65     };