1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 PCIe RC/EP controller
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
14 Generic Freescale i.MX PCIe Root Port and Endpoint controller
30 $ref: /schemas/types.yaml#/definitions/phandle
31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional
32 required properties for imx7d-pcie, imx7d-pcie-ep, imx8mq-pcie,
38 - description: The phandle pointing to the DISPLAY domain for
39 imx6sx-pcie, imx6sx-pcie-ep, to PCIE_PHY power domain for
40 imx7d-pcie, imx7d-pcie-ep, imx8mq-pcie and imx8mq-pcie-ep.
41 - description: The phandle pointing to the PCIE_PHY power domains
42 for imx6sx-pcie and imx6sx-pcie-ep.
53 description: Phandles to PCIe-related reset lines exposed by SRC
54 IP block. Additional required by imx7d-pcie, imx7d-pcie-ep,
55 imx8mq-pcie, and imx8mq-pcie-ep.
62 description: Gen1 De-emphasis value (optional required).
63 $ref: /schemas/types.yaml#/definitions/uint32
66 fsl,tx-deemph-gen2-3p5db:
67 description: Gen2 (3.5db) De-emphasis value (optional required).
68 $ref: /schemas/types.yaml#/definitions/uint32
71 fsl,tx-deemph-gen2-6db:
72 description: Gen2 (6db) De-emphasis value (optional required).
73 $ref: /schemas/types.yaml#/definitions/uint32
77 description: Gen2 TX SWING FULL value (optional required).
78 $ref: /schemas/types.yaml#/definitions/uint32
82 description: TX launch amplitude swing_low value (optional required).
83 $ref: /schemas/types.yaml#/definitions/uint32
87 description: Specify PCI Gen for link capability (optional required).
88 Note that the IMX6 LVDS clock outputs do not meet gen2 jitter
89 requirements and thus for gen2 capability a gen2 compliant clock
90 generator should be used and configured.
91 $ref: /schemas/types.yaml#/definitions/uint32
102 description: Should specify the regulator in charge of PCIe port power.
103 The regulator will be enabled when initializing the PCIe host and
104 disabled either as part of the init process or when shutting down
105 the host (optional required).
108 description: Should specify the regulator in charge of VPH one of
109 the three PCIe PHY powers. This regulator can be supplied by both
110 1.8v and 3.3v voltage supplies (optional required).
132 - const: pcie_inbound_axi
199 power-domain-names: false
218 power-domain-names: false
253 additionalProperties: true