1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC8280XP Peripheral Authentication Service
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 Qualcomm SC8280XP SoC Peripheral Authentication Service loads and boots
14 firmware on the Qualcomm DSP Hexagon cores.
19 - qcom,sc8280xp-adsp-pas
20 - qcom,sc8280xp-nsp0-pas
21 - qcom,sc8280xp-nsp1-pas
28 - description: XO clock
35 $ref: /schemas/types.yaml#/definitions/phandle
36 description: Reference to the AOSS side-channel message RAM.
42 description: Reference to the reserved-memory for the Hexagon core
45 $ref: /schemas/types.yaml#/definitions/string
46 description: Firmware name for the Hexagon core
54 - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
59 - qcom,sc8280xp-nsp0-pas
60 - qcom,sc8280xp-nsp1-pas
78 - qcom,sc8280xp-adsp-pas
83 - description: LCX power domain
84 - description: LMX power domain
93 - description: NSP power domain
98 unevaluatedProperties: false
102 #include <dt-bindings/clock/qcom,rpmh.h>
103 #include <dt-bindings/interrupt-controller/arm-gic.h>
104 #include <dt-bindings/interrupt-controller/irq.h>
105 #include <dt-bindings/mailbox/qcom-ipcc.h>
106 #include <dt-bindings/power/qcom-rpmpd.h>
109 compatible = "qcom,sc8280xp-adsp-pas";
110 reg = <0x03000000 0x100>;
112 clocks = <&rpmhcc RPMH_CXO_CLK>;
115 firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
117 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
118 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
119 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
120 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
121 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>,
122 <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>;
123 interrupt-names = "wdog", "fatal", "ready",
124 "handover", "stop-ack", "shutdown-ack";
126 memory-region = <&pil_adsp_mem>;
128 power-domains = <&rpmhpd SC8280XP_LCX>,
129 <&rpmhpd SC8280XP_LMX>;
130 power-domain-names = "lcx", "lmx";
132 qcom,qmp = <&aoss_qmp>;
133 qcom,smem-states = <&smp2p_adsp_out 0>;
134 qcom,smem-state-names = "stop";
137 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
138 IPCC_MPROC_SIGNAL_GLINK_QMP
139 IRQ_TYPE_EDGE_RISING>;
140 mboxes = <&ipcc IPCC_CLIENT_LPASS
141 IPCC_MPROC_SIGNAL_GLINK_QMP>;
144 qcom,remote-pid = <2>;