1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx R5F processor subsystem
10 - Ben Levinsky <ben.levinsky@amd.com>
11 - Tanmay Shah <tanmay.shah@amd.com>
14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
15 real-time processing based on the Cortex-R5F processor core from ARM.
16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a
17 floating-point unit that implements the Arm VFPv3 instruction set.
24 - xlnx,versal-net-r52fss
34 Standard ranges definition providing address translations for
35 local R5F TCM address spaces to bus addresses.
38 $ref: /schemas/types.yaml#/definitions/uint32
42 The RPU MPCore can operate in split mode (Dual-processor performance), Safety
43 lock-step mode(Both RPU cores execute the same code in lock-step,
44 clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while
45 core 1 runs normally). The processor does not support dynamic configuration.
46 Switching between modes is only permitted immediately after a processor reset.
47 If set to 1 then lockstep mode and if 0 then split mode.
48 If set to 2 then single CPU mode. When not defined, default will be lockstep mode.
51 1: lockstep mode (default)
55 $ref: /schemas/types.yaml#/definitions/uint32
65 additionalProperties: false
67 The RPU is located in the Low Power Domain of the Processor Subsystem.
68 Each processor includes separate L1 instruction and data caches and
69 tightly coupled memories (TCM). System memory is cacheable, but the TCM
70 memory space is non-cacheable.
72 Each RPU contains one 64KB memory and two 32KB memories that
73 are accessed via the TCM A and B port interfaces, for a total of 128KB
74 per processor. In lock-step mode, the processor has access to 256KB of
82 - xlnx,versal-net-r52f
99 - description: mailbox channel to send data to RPU
100 - description: mailbox channel to receive data from RPU
109 $ref: /schemas/types.yaml#/definitions/phandle-array
115 phandles to one or more reserved on-chip SRAM regions. Other than TCM,
116 the RPU can execute instructions and access data from the OCM memory,
117 the main DDR memory, and other system memories.
119 The regions should be defined as child nodes of the respective SRAM
120 node, and should be defined as per the generic bindings in
121 Documentation/devicetree/bindings/sram/sram.yaml
125 List of phandles to the reserved memory regions associated with the
126 remoteproc device. This is variable and describes the memories shared with
127 the remote processor (e.g. remoteproc firmware and carveouts, rpmsg
128 vrings, ...). This reserved memory region will be allocated in DDR memory.
132 - description: region used for RPU firmware image section
133 - description: vdev buffer
134 - description: vring0
135 - description: vring1
136 additionalItems: true
156 - xlnx,versal-net-r52fss
169 - description: ATCM internal memory
170 - description: BTCM internal memory
171 - description: CTCM internal memory
183 - description: RPU core power domain
184 - description: ATCM power domain
185 - description: BTCM power domain
186 - description: CTCM power domain
213 - description: ATCM internal memory
214 - description: BTCM internal memory
215 - description: extra ATCM memory in lockstep mode
216 - description: extra BTCM memory in lockstep mode
229 - description: RPU core power domain
230 - description: ATCM power domain
231 - description: BTCM power domain
232 - description: second ATCM power domain
233 - description: second BTCM power domain
251 - description: ATCM internal memory
252 - description: BTCM internal memory
263 - description: RPU core power domain
264 - description: ATCM power domain
265 - description: BTCM power domain
270 additionalProperties: false
274 #include <dt-bindings/power/xlnx-zynqmp-power.h>
276 // Split mode configuration
278 #address-cells = <2>;
281 remoteproc@ffe00000 {
282 compatible = "xlnx,zynqmp-r5fss";
283 xlnx,cluster-mode = <0>;
286 #address-cells = <2>;
288 ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
289 <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
290 <0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
291 <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;
294 compatible = "xlnx,zynqmp-r5f";
295 reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
296 reg-names = "atcm0", "btcm0";
297 power-domains = <&zynqmp_firmware PD_RPU_0>,
298 <&zynqmp_firmware PD_R5_0_ATCM>,
299 <&zynqmp_firmware PD_R5_0_BTCM>;
300 memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
301 <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
302 mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
303 mbox-names = "tx", "rx";
307 compatible = "xlnx,zynqmp-r5f";
308 reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
309 reg-names = "atcm0", "btcm0";
310 power-domains = <&zynqmp_firmware PD_RPU_1>,
311 <&zynqmp_firmware PD_R5_1_ATCM>,
312 <&zynqmp_firmware PD_R5_1_BTCM>;
313 memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
314 <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
315 mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
316 mbox-names = "tx", "rx";
322 //Lockstep configuration
324 #address-cells = <2>;
327 remoteproc@ffe00000 {
328 compatible = "xlnx,zynqmp-r5fss";
329 xlnx,cluster-mode = <1>;
332 #address-cells = <2>;
334 ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
335 <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
336 <0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
337 <0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;
340 compatible = "xlnx,zynqmp-r5f";
341 reg = <0x0 0x0 0x0 0x10000>,
342 <0x0 0x20000 0x0 0x10000>,
343 <0x0 0x10000 0x0 0x10000>,
344 <0x0 0x30000 0x0 0x10000>;
345 reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
346 power-domains = <&zynqmp_firmware PD_RPU_0>,
347 <&zynqmp_firmware PD_R5_0_ATCM>,
348 <&zynqmp_firmware PD_R5_0_BTCM>,
349 <&zynqmp_firmware PD_R5_1_ATCM>,
350 <&zynqmp_firmware PD_R5_1_BTCM>;
351 memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
352 <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
353 mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
354 mbox-names = "tx", "rx";
358 compatible = "xlnx,zynqmp-r5f";
359 reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
360 reg-names = "atcm0", "btcm0";
361 power-domains = <&zynqmp_firmware PD_RPU_1>,
362 <&zynqmp_firmware PD_R5_1_ATCM>,
363 <&zynqmp_firmware PD_R5_1_BTCM>;
364 memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
365 <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
366 mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
367 mbox-names = "tx", "rx";