1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
11 audio data transfer between devices in the system.
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
39 - const: rockchip,rk3066-i2s
49 - description: clock for I2S controller
50 - description: clock for I2S BUS
87 $ref: audio-graph-port.yaml#
88 unevaluatedProperties: false
90 rockchip,capture-channels:
91 $ref: /schemas/types.yaml#/definitions/uint32
94 Max capture channels, if not set, 2 channels default.
96 rockchip,playback-channels:
97 $ref: /schemas/types.yaml#/definitions/uint32
100 Max playback channels, if not set, 8 channels default.
103 $ref: /schemas/types.yaml#/definitions/phandle
105 The phandle of the syscon node for the GRF register.
106 Required property for controllers which support multi channel
122 unevaluatedProperties: false
126 #include <dt-bindings/clock/rk3288-cru.h>
127 #include <dt-bindings/interrupt-controller/arm-gic.h>
128 #include <dt-bindings/interrupt-controller/irq.h>
130 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
131 reg = <0xff890000 0x10000>;
132 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
133 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
134 clock-names = "i2s_clk", "i2s_hclk";
135 dmas = <&pdma1 0>, <&pdma1 1>;
136 dma-names = "tx", "rx";
137 rockchip,capture-channels = <2>;
138 rockchip,playback-channels = <8>;
139 #sound-dai-cells = <0>;