1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/sound/snps,designware-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DesignWare I2S controller
10 - Jose Abreu <joabreu@synopsys.com>
16 - const: canaan,k210-i2s
17 - const: snps,designware-i2s
20 - starfive,jh7110-i2stx0
21 - starfive,jh7110-i2stx1
22 - starfive,jh7110-i2srx
29 The interrupt line number for the I2S controller. Add this
30 parameter if the I2S controller that you are using does not
36 - description: Sampling rate reference clock
37 - description: APB clock
38 - description: Audio master clock
39 - description: Inner audio master clock source
40 - description: External audio master clock source
41 - description: Bit clock
42 - description: Left/right channel clock
43 - description: External bit clock
44 - description: External left/right channel clock
62 - description: Optional controller resets
63 - description: controller reset of Sampling rate
68 - description: TX DMA Channel
69 - description: RX DMA Channel
79 $ref: /schemas/types.yaml#/definitions/phandle-array
82 - description: phandle to System Register Controller sys_syscon node.
83 - description: I2S-rx enabled control offset of SYS_SYSCONSAIF__SYSCFG register.
84 - description: I2S-rx enabled control mask
86 The phandle to System Register Controller syscon node and the I2S-rx(ADC)
87 enabled control offset and mask of SYS_SYSCONSAIF__SYSCFG register.
90 - $ref: dai-common.yaml#
95 const: canaan,k210-i2s
108 const: snps,designware-i2s
126 const: starfive,jh7110-i2stx0
141 const: starfive,jh7110-i2stx1
156 const: starfive,jh7110-i2srx
170 starfive,syscon: false
185 unevaluatedProperties: false
189 soc_i2s: i2s@7ff90000 {
190 compatible = "snps,designware-i2s";
191 reg = <0x7ff90000 0x1000>;
192 clocks = <&scpi_i2sclk 0>;
193 clock-names = "i2sclk";
194 #sound-dai-cells = <0>;