1 // SPDX-License-Identifier: GPL-2.0+
3 * Serial Port driver for Tegra devices
5 * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
8 #include <linux/acpi.h>
10 #include <linux/console.h>
11 #include <linux/delay.h>
13 #include <linux/module.h>
15 #include <linux/reset.h>
16 #include <linux/slab.h>
22 struct reset_control
*rst
;
26 static void tegra_uart_handle_break(struct uart_port
*p
)
28 unsigned int status
, tmout
= 10000;
31 status
= p
->serial_in(p
, UART_LSR
);
32 if (!(status
& (UART_LSR_FIFOE
| UART_LSR_BRK_ERROR_BITS
)))
35 p
->serial_in(p
, UART_RX
);
43 static int tegra_uart_probe(struct platform_device
*pdev
)
45 struct uart_8250_port port8250
;
46 struct tegra_uart
*uart
;
47 struct uart_port
*port
;
51 uart
= devm_kzalloc(&pdev
->dev
, sizeof(*uart
), GFP_KERNEL
);
55 memset(&port8250
, 0, sizeof(port8250
));
57 port
= &port8250
.port
;
58 spin_lock_init(&port
->lock
);
60 port
->flags
= UPF_BOOT_AUTOCONF
| UPF_FIXED_PORT
| UPF_FIXED_TYPE
;
61 port
->type
= PORT_TEGRA
;
62 port
->dev
= &pdev
->dev
;
63 port
->handle_break
= tegra_uart_handle_break
;
65 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
69 port
->membase
= devm_ioremap(&pdev
->dev
, res
->start
,
74 port
->mapbase
= res
->start
;
75 port
->mapsize
= resource_size(res
);
77 ret
= uart_read_port_properties(port
);
81 port
->iotype
= UPIO_MEM32
;
84 uart
->rst
= devm_reset_control_get_optional_shared(&pdev
->dev
, NULL
);
85 if (IS_ERR(uart
->rst
))
86 return PTR_ERR(uart
->rst
);
89 uart
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
90 if (IS_ERR(uart
->clk
)) {
91 dev_err(&pdev
->dev
, "failed to get clock!\n");
95 ret
= clk_prepare_enable(uart
->clk
);
99 port
->uartclk
= clk_get_rate(uart
->clk
);
102 ret
= reset_control_deassert(uart
->rst
);
106 ret
= serial8250_register_8250_port(&port8250
);
108 goto err_ctrl_assert
;
110 platform_set_drvdata(pdev
, uart
);
116 reset_control_assert(uart
->rst
);
118 clk_disable_unprepare(uart
->clk
);
123 static void tegra_uart_remove(struct platform_device
*pdev
)
125 struct tegra_uart
*uart
= platform_get_drvdata(pdev
);
127 serial8250_unregister_port(uart
->line
);
128 reset_control_assert(uart
->rst
);
129 clk_disable_unprepare(uart
->clk
);
132 #ifdef CONFIG_PM_SLEEP
133 static int tegra_uart_suspend(struct device
*dev
)
135 struct tegra_uart
*uart
= dev_get_drvdata(dev
);
136 struct uart_8250_port
*port8250
= serial8250_get_port(uart
->line
);
137 struct uart_port
*port
= &port8250
->port
;
139 serial8250_suspend_port(uart
->line
);
141 if (!uart_console(port
) || console_suspend_enabled
)
142 clk_disable_unprepare(uart
->clk
);
147 static int tegra_uart_resume(struct device
*dev
)
149 struct tegra_uart
*uart
= dev_get_drvdata(dev
);
150 struct uart_8250_port
*port8250
= serial8250_get_port(uart
->line
);
151 struct uart_port
*port
= &port8250
->port
;
153 if (!uart_console(port
) || console_suspend_enabled
)
154 clk_prepare_enable(uart
->clk
);
156 serial8250_resume_port(uart
->line
);
162 static SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops
, tegra_uart_suspend
,
165 static const struct of_device_id tegra_uart_of_match
[] = {
166 { .compatible
= "nvidia,tegra20-uart", },
169 MODULE_DEVICE_TABLE(of
, tegra_uart_of_match
);
171 static const struct acpi_device_id tegra_uart_acpi_match
[] __maybe_unused
= {
175 MODULE_DEVICE_TABLE(acpi
, tegra_uart_acpi_match
);
177 static struct platform_driver tegra_uart_driver
= {
179 .name
= "tegra-uart",
180 .pm
= &tegra_uart_pm_ops
,
181 .of_match_table
= tegra_uart_of_match
,
182 .acpi_match_table
= ACPI_PTR(tegra_uart_acpi_match
),
184 .probe
= tegra_uart_probe
,
185 .remove_new
= tegra_uart_remove
,
188 module_platform_driver(tegra_uart_driver
);
190 MODULE_AUTHOR("Jeff Brasen <jbrasen@nvidia.com>");
191 MODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver");
192 MODULE_LICENSE("GPL v2");