1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012-2015 Spreadtrum Communications Inc.
7 #include <linux/console.h>
8 #include <linux/delay.h>
9 #include <linux/dmaengine.h>
10 #include <linux/dma-mapping.h>
11 #include <linux/dma/sprd-dma.h>
13 #include <linux/ioport.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/serial_core.h>
19 #include <linux/serial.h>
20 #include <linux/slab.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
26 #define SPRD_TTY_NAME "ttyS"
27 #define SPRD_FIFO_SIZE 128
28 #define SPRD_DEF_RATE 26000000
29 #define SPRD_BAUD_IO_LIMIT 3000000
30 #define SPRD_TIMEOUT 256000
32 /* the offset of serial registers and BITs for them */
34 #define SPRD_TXD 0x0000
35 #define SPRD_RXD 0x0004
37 /* line status register and its BITs */
38 #define SPRD_LSR 0x0008
39 #define SPRD_LSR_OE BIT(4)
40 #define SPRD_LSR_FE BIT(3)
41 #define SPRD_LSR_PE BIT(2)
42 #define SPRD_LSR_BI BIT(7)
43 #define SPRD_LSR_TX_OVER BIT(15)
45 /* data number in TX and RX fifo */
46 #define SPRD_STS1 0x000C
47 #define SPRD_RX_FIFO_CNT_MASK GENMASK(7, 0)
48 #define SPRD_TX_FIFO_CNT_MASK GENMASK(15, 8)
50 /* interrupt enable register and its BITs */
51 #define SPRD_IEN 0x0010
52 #define SPRD_IEN_RX_FULL BIT(0)
53 #define SPRD_IEN_TX_EMPTY BIT(1)
54 #define SPRD_IEN_BREAK_DETECT BIT(7)
55 #define SPRD_IEN_TIMEOUT BIT(13)
57 /* interrupt clear register */
58 #define SPRD_ICLR 0x0014
59 #define SPRD_ICLR_TIMEOUT BIT(13)
61 /* line control register */
62 #define SPRD_LCR 0x0018
63 #define SPRD_LCR_STOP_1BIT 0x10
64 #define SPRD_LCR_STOP_2BIT 0x30
65 #define SPRD_LCR_DATA_LEN (BIT(2) | BIT(3))
66 #define SPRD_LCR_DATA_LEN5 0x0
67 #define SPRD_LCR_DATA_LEN6 0x4
68 #define SPRD_LCR_DATA_LEN7 0x8
69 #define SPRD_LCR_DATA_LEN8 0xc
70 #define SPRD_LCR_PARITY (BIT(0) | BIT(1))
71 #define SPRD_LCR_PARITY_EN 0x2
72 #define SPRD_LCR_EVEN_PAR 0x0
73 #define SPRD_LCR_ODD_PAR 0x1
75 /* control register 1 */
76 #define SPRD_CTL1 0x001C
77 #define SPRD_DMA_EN BIT(15)
78 #define SPRD_LOOPBACK_EN BIT(14)
79 #define RX_HW_FLOW_CTL_THLD BIT(6)
80 #define RX_HW_FLOW_CTL_EN BIT(7)
81 #define TX_HW_FLOW_CTL_EN BIT(8)
82 #define RX_TOUT_THLD_DEF 0x3E00
83 #define RX_HFC_THLD_DEF 0x40
85 /* fifo threshold register */
86 #define SPRD_CTL2 0x0020
87 #define THLD_TX_EMPTY 0x40
88 #define THLD_TX_EMPTY_SHIFT 8
89 #define THLD_RX_FULL 0x40
90 #define THLD_RX_FULL_MASK GENMASK(6, 0)
92 /* config baud rate register */
93 #define SPRD_CLKD0 0x0024
94 #define SPRD_CLKD0_MASK GENMASK(15, 0)
95 #define SPRD_CLKD1 0x0028
96 #define SPRD_CLKD1_MASK GENMASK(20, 16)
97 #define SPRD_CLKD1_SHIFT 16
99 /* interrupt mask status register */
100 #define SPRD_IMSR 0x002C
101 #define SPRD_IMSR_RX_FIFO_FULL BIT(0)
102 #define SPRD_IMSR_TX_FIFO_EMPTY BIT(1)
103 #define SPRD_IMSR_BREAK_DETECT BIT(7)
104 #define SPRD_IMSR_TIMEOUT BIT(13)
105 #define SPRD_DEFAULT_SOURCE_CLK 26000000
107 #define SPRD_RX_DMA_STEP 1
108 #define SPRD_RX_FIFO_FULL 1
109 #define SPRD_TX_FIFO_FULL 0x20
110 #define SPRD_UART_RX_SIZE (UART_XMIT_SIZE / 4)
112 struct sprd_uart_dma
{
113 struct dma_chan
*chn
;
115 dma_addr_t phys_addr
;
121 struct sprd_uart_port
{
122 struct uart_port port
;
125 struct sprd_uart_dma tx_dma
;
126 struct sprd_uart_dma rx_dma
;
128 unsigned char *rx_buf_tail
;
131 static struct sprd_uart_port
*sprd_port
[UART_NR_MAX
];
132 static int sprd_ports_num
;
134 static int sprd_start_dma_rx(struct uart_port
*port
);
135 static int sprd_tx_dma_config(struct uart_port
*port
);
137 static inline unsigned int serial_in(struct uart_port
*port
,
140 return readl_relaxed(port
->membase
+ offset
);
143 static inline void serial_out(struct uart_port
*port
, unsigned int offset
,
146 writel_relaxed(value
, port
->membase
+ offset
);
149 static unsigned int sprd_tx_empty(struct uart_port
*port
)
151 if (serial_in(port
, SPRD_STS1
) & SPRD_TX_FIFO_CNT_MASK
)
157 static unsigned int sprd_get_mctrl(struct uart_port
*port
)
159 return TIOCM_DSR
| TIOCM_CTS
;
162 static void sprd_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
164 u32 val
= serial_in(port
, SPRD_CTL1
);
166 if (mctrl
& TIOCM_LOOP
)
167 val
|= SPRD_LOOPBACK_EN
;
169 val
&= ~SPRD_LOOPBACK_EN
;
171 serial_out(port
, SPRD_CTL1
, val
);
174 static void sprd_stop_rx(struct uart_port
*port
)
176 struct sprd_uart_port
*sp
=
177 container_of(port
, struct sprd_uart_port
, port
);
178 unsigned int ien
, iclr
;
180 if (sp
->rx_dma
.enable
)
181 dmaengine_terminate_all(sp
->rx_dma
.chn
);
183 iclr
= serial_in(port
, SPRD_ICLR
);
184 ien
= serial_in(port
, SPRD_IEN
);
186 ien
&= ~(SPRD_IEN_RX_FULL
| SPRD_IEN_BREAK_DETECT
);
187 iclr
|= SPRD_IEN_RX_FULL
| SPRD_IEN_BREAK_DETECT
;
189 serial_out(port
, SPRD_IEN
, ien
);
190 serial_out(port
, SPRD_ICLR
, iclr
);
193 static void sprd_uart_dma_enable(struct uart_port
*port
, bool enable
)
195 u32 val
= serial_in(port
, SPRD_CTL1
);
202 serial_out(port
, SPRD_CTL1
, val
);
205 static void sprd_stop_tx_dma(struct uart_port
*port
)
207 struct sprd_uart_port
*sp
=
208 container_of(port
, struct sprd_uart_port
, port
);
209 struct dma_tx_state state
;
212 dmaengine_pause(sp
->tx_dma
.chn
);
214 dmaengine_tx_status(sp
->tx_dma
.chn
, sp
->tx_dma
.cookie
, &state
);
216 trans_len
= state
.residue
- sp
->tx_dma
.phys_addr
;
217 uart_xmit_advance(port
, trans_len
);
218 dma_unmap_single(port
->dev
, sp
->tx_dma
.phys_addr
,
219 sp
->tx_dma
.trans_len
, DMA_TO_DEVICE
);
222 dmaengine_terminate_all(sp
->tx_dma
.chn
);
223 sp
->tx_dma
.trans_len
= 0;
226 static int sprd_tx_buf_remap(struct uart_port
*port
)
228 struct sprd_uart_port
*sp
=
229 container_of(port
, struct sprd_uart_port
, port
);
230 struct tty_port
*tport
= &port
->state
->port
;
233 sp
->tx_dma
.trans_len
= kfifo_out_linear_ptr(&tport
->xmit_fifo
, &tail
,
236 sp
->tx_dma
.phys_addr
= dma_map_single(port
->dev
, tail
,
237 sp
->tx_dma
.trans_len
,
239 return dma_mapping_error(port
->dev
, sp
->tx_dma
.phys_addr
);
242 static void sprd_complete_tx_dma(void *data
)
244 struct uart_port
*port
= (struct uart_port
*)data
;
245 struct sprd_uart_port
*sp
=
246 container_of(port
, struct sprd_uart_port
, port
);
247 struct tty_port
*tport
= &port
->state
->port
;
250 uart_port_lock_irqsave(port
, &flags
);
251 dma_unmap_single(port
->dev
, sp
->tx_dma
.phys_addr
,
252 sp
->tx_dma
.trans_len
, DMA_TO_DEVICE
);
254 uart_xmit_advance(port
, sp
->tx_dma
.trans_len
);
256 if (kfifo_len(&tport
->xmit_fifo
) < WAKEUP_CHARS
)
257 uart_write_wakeup(port
);
259 if (kfifo_is_empty(&tport
->xmit_fifo
) || sprd_tx_buf_remap(port
) ||
260 sprd_tx_dma_config(port
))
261 sp
->tx_dma
.trans_len
= 0;
263 uart_port_unlock_irqrestore(port
, flags
);
266 static int sprd_uart_dma_submit(struct uart_port
*port
,
267 struct sprd_uart_dma
*ud
, u32 trans_len
,
268 enum dma_transfer_direction direction
,
269 dma_async_tx_callback callback
)
271 struct dma_async_tx_descriptor
*dma_des
;
274 flags
= SPRD_DMA_FLAGS(SPRD_DMA_CHN_MODE_NONE
,
279 dma_des
= dmaengine_prep_slave_single(ud
->chn
, ud
->phys_addr
, trans_len
,
284 dma_des
->callback
= callback
;
285 dma_des
->callback_param
= port
;
287 ud
->cookie
= dmaengine_submit(dma_des
);
288 if (dma_submit_error(ud
->cookie
))
289 return dma_submit_error(ud
->cookie
);
291 dma_async_issue_pending(ud
->chn
);
296 static int sprd_tx_dma_config(struct uart_port
*port
)
298 struct sprd_uart_port
*sp
=
299 container_of(port
, struct sprd_uart_port
, port
);
300 u32 burst
= sp
->tx_dma
.trans_len
> SPRD_TX_FIFO_FULL
?
301 SPRD_TX_FIFO_FULL
: sp
->tx_dma
.trans_len
;
303 struct dma_slave_config cfg
= {
304 .dst_addr
= port
->mapbase
+ SPRD_TXD
,
305 .src_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
306 .dst_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
307 .src_maxburst
= burst
,
310 ret
= dmaengine_slave_config(sp
->tx_dma
.chn
, &cfg
);
314 return sprd_uart_dma_submit(port
, &sp
->tx_dma
, sp
->tx_dma
.trans_len
,
315 DMA_MEM_TO_DEV
, sprd_complete_tx_dma
);
318 static void sprd_start_tx_dma(struct uart_port
*port
)
320 struct sprd_uart_port
*sp
=
321 container_of(port
, struct sprd_uart_port
, port
);
322 struct tty_port
*tport
= &port
->state
->port
;
325 serial_out(port
, SPRD_TXD
, port
->x_char
);
331 if (kfifo_is_empty(&tport
->xmit_fifo
) || uart_tx_stopped(port
)) {
332 sprd_stop_tx_dma(port
);
336 if (sp
->tx_dma
.trans_len
)
339 if (sprd_tx_buf_remap(port
) || sprd_tx_dma_config(port
))
340 sp
->tx_dma
.trans_len
= 0;
343 static void sprd_rx_full_thld(struct uart_port
*port
, u32 thld
)
345 u32 val
= serial_in(port
, SPRD_CTL2
);
347 val
&= ~THLD_RX_FULL_MASK
;
348 val
|= thld
& THLD_RX_FULL_MASK
;
349 serial_out(port
, SPRD_CTL2
, val
);
352 static int sprd_rx_alloc_buf(struct sprd_uart_port
*sp
)
354 sp
->rx_dma
.virt
= dma_alloc_coherent(sp
->port
.dev
, SPRD_UART_RX_SIZE
,
355 &sp
->rx_dma
.phys_addr
, GFP_KERNEL
);
356 if (!sp
->rx_dma
.virt
)
362 static void sprd_rx_free_buf(struct sprd_uart_port
*sp
)
365 dma_free_coherent(sp
->port
.dev
, SPRD_UART_RX_SIZE
,
366 sp
->rx_dma
.virt
, sp
->rx_dma
.phys_addr
);
367 sp
->rx_dma
.virt
= NULL
;
370 static int sprd_rx_dma_config(struct uart_port
*port
, u32 burst
)
372 struct sprd_uart_port
*sp
=
373 container_of(port
, struct sprd_uart_port
, port
);
374 struct dma_slave_config cfg
= {
375 .src_addr
= port
->mapbase
+ SPRD_RXD
,
376 .src_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
377 .dst_addr_width
= DMA_SLAVE_BUSWIDTH_1_BYTE
,
378 .src_maxburst
= burst
,
381 return dmaengine_slave_config(sp
->rx_dma
.chn
, &cfg
);
384 static void sprd_uart_dma_rx(struct uart_port
*port
)
386 struct sprd_uart_port
*sp
=
387 container_of(port
, struct sprd_uart_port
, port
);
388 struct tty_port
*tty
= &port
->state
->port
;
390 port
->icount
.rx
+= sp
->rx_dma
.trans_len
;
391 tty_insert_flip_string(tty
, sp
->rx_buf_tail
, sp
->rx_dma
.trans_len
);
392 tty_flip_buffer_push(tty
);
395 static void sprd_uart_dma_irq(struct uart_port
*port
)
397 struct sprd_uart_port
*sp
=
398 container_of(port
, struct sprd_uart_port
, port
);
399 struct dma_tx_state state
;
400 enum dma_status status
;
402 status
= dmaengine_tx_status(sp
->rx_dma
.chn
,
403 sp
->rx_dma
.cookie
, &state
);
404 if (status
== DMA_ERROR
)
407 if (!state
.residue
&& sp
->pos
== sp
->rx_dma
.phys_addr
)
410 if (!state
.residue
) {
411 sp
->rx_dma
.trans_len
= SPRD_UART_RX_SIZE
+
412 sp
->rx_dma
.phys_addr
- sp
->pos
;
413 sp
->pos
= sp
->rx_dma
.phys_addr
;
415 sp
->rx_dma
.trans_len
= state
.residue
- sp
->pos
;
416 sp
->pos
= state
.residue
;
419 sprd_uart_dma_rx(port
);
420 sp
->rx_buf_tail
+= sp
->rx_dma
.trans_len
;
423 static void sprd_complete_rx_dma(void *data
)
425 struct uart_port
*port
= (struct uart_port
*)data
;
426 struct sprd_uart_port
*sp
=
427 container_of(port
, struct sprd_uart_port
, port
);
428 struct dma_tx_state state
;
429 enum dma_status status
;
432 uart_port_lock_irqsave(port
, &flags
);
434 status
= dmaengine_tx_status(sp
->rx_dma
.chn
,
435 sp
->rx_dma
.cookie
, &state
);
436 if (status
!= DMA_COMPLETE
) {
438 uart_port_unlock_irqrestore(port
, flags
);
442 if (sp
->pos
!= sp
->rx_dma
.phys_addr
) {
443 sp
->rx_dma
.trans_len
= SPRD_UART_RX_SIZE
+
444 sp
->rx_dma
.phys_addr
- sp
->pos
;
445 sprd_uart_dma_rx(port
);
446 sp
->rx_buf_tail
+= sp
->rx_dma
.trans_len
;
449 if (sprd_start_dma_rx(port
))
452 uart_port_unlock_irqrestore(port
, flags
);
455 static int sprd_start_dma_rx(struct uart_port
*port
)
457 struct sprd_uart_port
*sp
=
458 container_of(port
, struct sprd_uart_port
, port
);
461 if (!sp
->rx_dma
.enable
)
464 sp
->pos
= sp
->rx_dma
.phys_addr
;
465 sp
->rx_buf_tail
= sp
->rx_dma
.virt
;
466 sprd_rx_full_thld(port
, SPRD_RX_FIFO_FULL
);
467 ret
= sprd_rx_dma_config(port
, SPRD_RX_DMA_STEP
);
471 return sprd_uart_dma_submit(port
, &sp
->rx_dma
, SPRD_UART_RX_SIZE
,
472 DMA_DEV_TO_MEM
, sprd_complete_rx_dma
);
475 static void sprd_release_dma(struct uart_port
*port
)
477 struct sprd_uart_port
*sp
=
478 container_of(port
, struct sprd_uart_port
, port
);
480 sprd_uart_dma_enable(port
, false);
482 if (sp
->rx_dma
.enable
)
483 dma_release_channel(sp
->rx_dma
.chn
);
485 if (sp
->tx_dma
.enable
)
486 dma_release_channel(sp
->tx_dma
.chn
);
488 sp
->tx_dma
.enable
= false;
489 sp
->rx_dma
.enable
= false;
492 static void sprd_request_dma(struct uart_port
*port
)
494 struct sprd_uart_port
*sp
=
495 container_of(port
, struct sprd_uart_port
, port
);
497 sp
->tx_dma
.enable
= true;
498 sp
->rx_dma
.enable
= true;
500 sp
->tx_dma
.chn
= dma_request_chan(port
->dev
, "tx");
501 if (IS_ERR(sp
->tx_dma
.chn
)) {
502 dev_err(port
->dev
, "request TX DMA channel failed, ret = %ld\n",
503 PTR_ERR(sp
->tx_dma
.chn
));
504 sp
->tx_dma
.enable
= false;
507 sp
->rx_dma
.chn
= dma_request_chan(port
->dev
, "rx");
508 if (IS_ERR(sp
->rx_dma
.chn
)) {
509 dev_err(port
->dev
, "request RX DMA channel failed, ret = %ld\n",
510 PTR_ERR(sp
->rx_dma
.chn
));
511 sp
->rx_dma
.enable
= false;
515 static void sprd_stop_tx(struct uart_port
*port
)
517 struct sprd_uart_port
*sp
= container_of(port
, struct sprd_uart_port
,
519 unsigned int ien
, iclr
;
521 if (sp
->tx_dma
.enable
) {
522 sprd_stop_tx_dma(port
);
526 iclr
= serial_in(port
, SPRD_ICLR
);
527 ien
= serial_in(port
, SPRD_IEN
);
529 iclr
|= SPRD_IEN_TX_EMPTY
;
530 ien
&= ~SPRD_IEN_TX_EMPTY
;
532 serial_out(port
, SPRD_IEN
, ien
);
533 serial_out(port
, SPRD_ICLR
, iclr
);
536 static void sprd_start_tx(struct uart_port
*port
)
538 struct sprd_uart_port
*sp
= container_of(port
, struct sprd_uart_port
,
542 if (sp
->tx_dma
.enable
) {
543 sprd_start_tx_dma(port
);
547 ien
= serial_in(port
, SPRD_IEN
);
548 if (!(ien
& SPRD_IEN_TX_EMPTY
)) {
549 ien
|= SPRD_IEN_TX_EMPTY
;
550 serial_out(port
, SPRD_IEN
, ien
);
554 /* The Sprd serial does not support this function. */
555 static void sprd_break_ctl(struct uart_port
*port
, int break_state
)
560 static int handle_lsr_errors(struct uart_port
*port
,
567 if (*lsr
& SPRD_LSR_BI
) {
568 *lsr
&= ~(SPRD_LSR_FE
| SPRD_LSR_PE
);
570 ret
= uart_handle_break(port
);
573 } else if (*lsr
& SPRD_LSR_PE
)
574 port
->icount
.parity
++;
575 else if (*lsr
& SPRD_LSR_FE
)
576 port
->icount
.frame
++;
577 if (*lsr
& SPRD_LSR_OE
)
578 port
->icount
.overrun
++;
580 /* mask off conditions which should be ignored */
581 *lsr
&= port
->read_status_mask
;
582 if (*lsr
& SPRD_LSR_BI
)
584 else if (*lsr
& SPRD_LSR_PE
)
586 else if (*lsr
& SPRD_LSR_FE
)
592 static inline void sprd_rx(struct uart_port
*port
)
594 struct sprd_uart_port
*sp
= container_of(port
, struct sprd_uart_port
,
596 struct tty_port
*tty
= &port
->state
->port
;
597 unsigned int lsr
, max_count
= SPRD_TIMEOUT
;
600 if (sp
->rx_dma
.enable
) {
601 sprd_uart_dma_irq(port
);
605 while ((serial_in(port
, SPRD_STS1
) & SPRD_RX_FIFO_CNT_MASK
) &&
607 lsr
= serial_in(port
, SPRD_LSR
);
608 ch
= serial_in(port
, SPRD_RXD
);
612 if (lsr
& (SPRD_LSR_BI
| SPRD_LSR_PE
|
613 SPRD_LSR_FE
| SPRD_LSR_OE
))
614 if (handle_lsr_errors(port
, &flag
, &lsr
))
616 if (uart_handle_sysrq_char(port
, ch
))
619 uart_insert_char(port
, lsr
, SPRD_LSR_OE
, ch
, flag
);
622 tty_flip_buffer_push(tty
);
625 static inline void sprd_tx(struct uart_port
*port
)
629 uart_port_tx_limited(port
, ch
, THLD_TX_EMPTY
,
631 serial_out(port
, SPRD_TXD
, ch
),
635 /* this handles the interrupt from one port */
636 static irqreturn_t
sprd_handle_irq(int irq
, void *dev_id
)
638 struct uart_port
*port
= dev_id
;
641 uart_port_lock(port
);
643 ims
= serial_in(port
, SPRD_IMSR
);
646 uart_port_unlock(port
);
650 if (ims
& SPRD_IMSR_TIMEOUT
)
651 serial_out(port
, SPRD_ICLR
, SPRD_ICLR_TIMEOUT
);
653 if (ims
& SPRD_IMSR_BREAK_DETECT
)
654 serial_out(port
, SPRD_ICLR
, SPRD_IMSR_BREAK_DETECT
);
656 if (ims
& (SPRD_IMSR_RX_FIFO_FULL
| SPRD_IMSR_BREAK_DETECT
|
660 if (ims
& SPRD_IMSR_TX_FIFO_EMPTY
)
663 uart_port_unlock(port
);
668 static void sprd_uart_dma_startup(struct uart_port
*port
,
669 struct sprd_uart_port
*sp
)
673 sprd_request_dma(port
);
674 if (!(sp
->rx_dma
.enable
|| sp
->tx_dma
.enable
))
677 ret
= sprd_start_dma_rx(port
);
679 sp
->rx_dma
.enable
= false;
680 dma_release_channel(sp
->rx_dma
.chn
);
681 dev_warn(port
->dev
, "fail to start RX dma mode\n");
684 sprd_uart_dma_enable(port
, true);
687 static int sprd_startup(struct uart_port
*port
)
690 unsigned int ien
, fc
;
691 unsigned int timeout
;
692 struct sprd_uart_port
*sp
;
695 serial_out(port
, SPRD_CTL2
,
696 THLD_TX_EMPTY
<< THLD_TX_EMPTY_SHIFT
| THLD_RX_FULL
);
699 timeout
= SPRD_TIMEOUT
;
700 while (timeout
-- && serial_in(port
, SPRD_STS1
) & SPRD_RX_FIFO_CNT_MASK
)
701 serial_in(port
, SPRD_RXD
);
704 timeout
= SPRD_TIMEOUT
;
705 while (timeout
-- && serial_in(port
, SPRD_STS1
) & SPRD_TX_FIFO_CNT_MASK
)
708 /* clear interrupt */
709 serial_out(port
, SPRD_IEN
, 0);
710 serial_out(port
, SPRD_ICLR
, ~0);
713 sp
= container_of(port
, struct sprd_uart_port
, port
);
714 snprintf(sp
->name
, sizeof(sp
->name
), "sprd_serial%d", port
->line
);
716 sprd_uart_dma_startup(port
, sp
);
718 ret
= devm_request_irq(port
->dev
, port
->irq
, sprd_handle_irq
,
719 IRQF_SHARED
, sp
->name
, port
);
721 dev_err(port
->dev
, "fail to request serial irq %d, ret=%d\n",
725 fc
= serial_in(port
, SPRD_CTL1
);
726 fc
|= RX_TOUT_THLD_DEF
| RX_HFC_THLD_DEF
;
727 serial_out(port
, SPRD_CTL1
, fc
);
729 /* enable interrupt */
730 uart_port_lock_irqsave(port
, &flags
);
731 ien
= serial_in(port
, SPRD_IEN
);
732 ien
|= SPRD_IEN_BREAK_DETECT
| SPRD_IEN_TIMEOUT
;
733 if (!sp
->rx_dma
.enable
)
734 ien
|= SPRD_IEN_RX_FULL
;
735 serial_out(port
, SPRD_IEN
, ien
);
736 uart_port_unlock_irqrestore(port
, flags
);
741 static void sprd_shutdown(struct uart_port
*port
)
743 sprd_release_dma(port
);
744 serial_out(port
, SPRD_IEN
, 0);
745 serial_out(port
, SPRD_ICLR
, ~0);
746 devm_free_irq(port
->dev
, port
->irq
, port
);
749 static void sprd_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
750 const struct ktermios
*old
)
752 unsigned int baud
, quot
;
753 unsigned int lcr
= 0, fc
;
756 /* ask the core to calculate the divisor for us */
757 baud
= uart_get_baud_rate(port
, termios
, old
, 0, SPRD_BAUD_IO_LIMIT
);
759 quot
= port
->uartclk
/ baud
;
761 /* set data length */
762 switch (termios
->c_cflag
& CSIZE
) {
764 lcr
|= SPRD_LCR_DATA_LEN5
;
767 lcr
|= SPRD_LCR_DATA_LEN6
;
770 lcr
|= SPRD_LCR_DATA_LEN7
;
774 lcr
|= SPRD_LCR_DATA_LEN8
;
778 /* calculate stop bits */
779 lcr
&= ~(SPRD_LCR_STOP_1BIT
| SPRD_LCR_STOP_2BIT
);
780 if (termios
->c_cflag
& CSTOPB
)
781 lcr
|= SPRD_LCR_STOP_2BIT
;
783 lcr
|= SPRD_LCR_STOP_1BIT
;
785 /* calculate parity */
786 lcr
&= ~SPRD_LCR_PARITY
;
787 termios
->c_cflag
&= ~CMSPAR
; /* no support mark/space */
788 if (termios
->c_cflag
& PARENB
) {
789 lcr
|= SPRD_LCR_PARITY_EN
;
790 if (termios
->c_cflag
& PARODD
)
791 lcr
|= SPRD_LCR_ODD_PAR
;
793 lcr
|= SPRD_LCR_EVEN_PAR
;
796 uart_port_lock_irqsave(port
, &flags
);
798 /* update the per-port timeout */
799 uart_update_timeout(port
, termios
->c_cflag
, baud
);
801 port
->read_status_mask
= SPRD_LSR_OE
;
802 if (termios
->c_iflag
& INPCK
)
803 port
->read_status_mask
|= SPRD_LSR_FE
| SPRD_LSR_PE
;
804 if (termios
->c_iflag
& (IGNBRK
| BRKINT
| PARMRK
))
805 port
->read_status_mask
|= SPRD_LSR_BI
;
807 /* characters to ignore */
808 port
->ignore_status_mask
= 0;
809 if (termios
->c_iflag
& IGNPAR
)
810 port
->ignore_status_mask
|= SPRD_LSR_PE
| SPRD_LSR_FE
;
811 if (termios
->c_iflag
& IGNBRK
) {
812 port
->ignore_status_mask
|= SPRD_LSR_BI
;
814 * If we're ignoring parity and break indicators,
815 * ignore overruns too (for real raw support).
817 if (termios
->c_iflag
& IGNPAR
)
818 port
->ignore_status_mask
|= SPRD_LSR_OE
;
822 fc
= serial_in(port
, SPRD_CTL1
);
823 fc
&= ~(RX_HW_FLOW_CTL_THLD
| RX_HW_FLOW_CTL_EN
| TX_HW_FLOW_CTL_EN
);
824 if (termios
->c_cflag
& CRTSCTS
) {
825 fc
|= RX_HW_FLOW_CTL_THLD
;
826 fc
|= RX_HW_FLOW_CTL_EN
;
827 fc
|= TX_HW_FLOW_CTL_EN
;
830 /* clock divider bit0~bit15 */
831 serial_out(port
, SPRD_CLKD0
, quot
& SPRD_CLKD0_MASK
);
833 /* clock divider bit16~bit20 */
834 serial_out(port
, SPRD_CLKD1
,
835 (quot
& SPRD_CLKD1_MASK
) >> SPRD_CLKD1_SHIFT
);
836 serial_out(port
, SPRD_LCR
, lcr
);
837 fc
|= RX_TOUT_THLD_DEF
| RX_HFC_THLD_DEF
;
838 serial_out(port
, SPRD_CTL1
, fc
);
840 uart_port_unlock_irqrestore(port
, flags
);
842 /* Don't rewrite B0 */
843 if (tty_termios_baud_rate(termios
))
844 tty_termios_encode_baud_rate(termios
, baud
, baud
);
847 static const char *sprd_type(struct uart_port
*port
)
852 static void sprd_release_port(struct uart_port
*port
)
857 static int sprd_request_port(struct uart_port
*port
)
862 static void sprd_config_port(struct uart_port
*port
, int flags
)
864 if (flags
& UART_CONFIG_TYPE
)
865 port
->type
= PORT_SPRD
;
868 static int sprd_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
870 if (ser
->type
!= PORT_SPRD
)
872 if (port
->irq
!= ser
->irq
)
874 if (port
->iotype
!= ser
->io_type
)
879 static void sprd_pm(struct uart_port
*port
, unsigned int state
,
880 unsigned int oldstate
)
882 struct sprd_uart_port
*sup
=
883 container_of(port
, struct sprd_uart_port
, port
);
886 case UART_PM_STATE_ON
:
887 clk_prepare_enable(sup
->clk
);
889 case UART_PM_STATE_OFF
:
890 clk_disable_unprepare(sup
->clk
);
895 #ifdef CONFIG_CONSOLE_POLL
896 static int sprd_poll_init(struct uart_port
*port
)
898 if (port
->state
->pm_state
!= UART_PM_STATE_ON
) {
899 sprd_pm(port
, UART_PM_STATE_ON
, 0);
900 port
->state
->pm_state
= UART_PM_STATE_ON
;
906 static int sprd_poll_get_char(struct uart_port
*port
)
908 while (!(serial_in(port
, SPRD_STS1
) & SPRD_RX_FIFO_CNT_MASK
))
911 return serial_in(port
, SPRD_RXD
);
914 static void sprd_poll_put_char(struct uart_port
*port
, unsigned char ch
)
916 while (serial_in(port
, SPRD_STS1
) & SPRD_TX_FIFO_CNT_MASK
)
919 serial_out(port
, SPRD_TXD
, ch
);
923 static const struct uart_ops serial_sprd_ops
= {
924 .tx_empty
= sprd_tx_empty
,
925 .get_mctrl
= sprd_get_mctrl
,
926 .set_mctrl
= sprd_set_mctrl
,
927 .stop_tx
= sprd_stop_tx
,
928 .start_tx
= sprd_start_tx
,
929 .stop_rx
= sprd_stop_rx
,
930 .break_ctl
= sprd_break_ctl
,
931 .startup
= sprd_startup
,
932 .shutdown
= sprd_shutdown
,
933 .set_termios
= sprd_set_termios
,
935 .release_port
= sprd_release_port
,
936 .request_port
= sprd_request_port
,
937 .config_port
= sprd_config_port
,
938 .verify_port
= sprd_verify_port
,
940 #ifdef CONFIG_CONSOLE_POLL
941 .poll_init
= sprd_poll_init
,
942 .poll_get_char
= sprd_poll_get_char
,
943 .poll_put_char
= sprd_poll_put_char
,
947 #ifdef CONFIG_SERIAL_SPRD_CONSOLE
948 static void wait_for_xmitr(struct uart_port
*port
)
950 unsigned int status
, tmout
= 10000;
952 /* wait up to 10ms for the character(s) to be sent */
954 status
= serial_in(port
, SPRD_STS1
);
958 } while (status
& SPRD_TX_FIFO_CNT_MASK
);
961 static void sprd_console_putchar(struct uart_port
*port
, unsigned char ch
)
963 wait_for_xmitr(port
);
964 serial_out(port
, SPRD_TXD
, ch
);
967 static void sprd_console_write(struct console
*co
, const char *s
,
970 struct uart_port
*port
= &sprd_port
[co
->index
]->port
;
976 else if (oops_in_progress
)
977 locked
= uart_port_trylock_irqsave(port
, &flags
);
979 uart_port_lock_irqsave(port
, &flags
);
981 uart_console_write(port
, s
, count
, sprd_console_putchar
);
983 /* wait for transmitter to become empty */
984 wait_for_xmitr(port
);
987 uart_port_unlock_irqrestore(port
, flags
);
990 static int sprd_console_setup(struct console
*co
, char *options
)
992 struct sprd_uart_port
*sprd_uart_port
;
998 if (co
->index
>= UART_NR_MAX
|| co
->index
< 0)
1001 sprd_uart_port
= sprd_port
[co
->index
];
1002 if (!sprd_uart_port
|| !sprd_uart_port
->port
.membase
) {
1003 pr_info("serial port %d not yet initialized\n", co
->index
);
1008 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1010 return uart_set_options(&sprd_uart_port
->port
, co
, baud
,
1011 parity
, bits
, flow
);
1014 static struct uart_driver sprd_uart_driver
;
1015 static struct console sprd_console
= {
1016 .name
= SPRD_TTY_NAME
,
1017 .write
= sprd_console_write
,
1018 .device
= uart_console_device
,
1019 .setup
= sprd_console_setup
,
1020 .flags
= CON_PRINTBUFFER
,
1022 .data
= &sprd_uart_driver
,
1025 static int __init
sprd_serial_console_init(void)
1027 register_console(&sprd_console
);
1030 console_initcall(sprd_serial_console_init
);
1032 #define SPRD_CONSOLE (&sprd_console)
1034 /* Support for earlycon */
1035 static void sprd_putc(struct uart_port
*port
, unsigned char c
)
1037 unsigned int timeout
= SPRD_TIMEOUT
;
1040 !(readl(port
->membase
+ SPRD_LSR
) & SPRD_LSR_TX_OVER
))
1043 writeb(c
, port
->membase
+ SPRD_TXD
);
1046 static void sprd_early_write(struct console
*con
, const char *s
, unsigned int n
)
1048 struct earlycon_device
*dev
= con
->data
;
1050 uart_console_write(&dev
->port
, s
, n
, sprd_putc
);
1053 static int __init
sprd_early_console_setup(struct earlycon_device
*device
,
1056 if (!device
->port
.membase
)
1059 device
->con
->write
= sprd_early_write
;
1062 OF_EARLYCON_DECLARE(sprd_serial
, "sprd,sc9836-uart",
1063 sprd_early_console_setup
);
1065 #else /* !CONFIG_SERIAL_SPRD_CONSOLE */
1066 #define SPRD_CONSOLE NULL
1069 static struct uart_driver sprd_uart_driver
= {
1070 .owner
= THIS_MODULE
,
1071 .driver_name
= "sprd_serial",
1072 .dev_name
= SPRD_TTY_NAME
,
1076 .cons
= SPRD_CONSOLE
,
1079 static void sprd_remove(struct platform_device
*dev
)
1081 struct sprd_uart_port
*sup
= platform_get_drvdata(dev
);
1084 uart_remove_one_port(&sprd_uart_driver
, &sup
->port
);
1085 sprd_port
[sup
->port
.line
] = NULL
;
1086 sprd_rx_free_buf(sup
);
1090 if (!sprd_ports_num
)
1091 uart_unregister_driver(&sprd_uart_driver
);
1094 static bool sprd_uart_is_console(struct uart_port
*uport
)
1096 struct console
*cons
= sprd_uart_driver
.cons
;
1098 if ((cons
&& cons
->index
>= 0 && cons
->index
== uport
->line
) ||
1099 of_console_check(uport
->dev
->of_node
, SPRD_TTY_NAME
, uport
->line
))
1105 static int sprd_clk_init(struct uart_port
*uport
)
1107 struct clk
*clk_uart
, *clk_parent
;
1108 struct sprd_uart_port
*u
= container_of(uport
, struct sprd_uart_port
, port
);
1110 clk_uart
= devm_clk_get(uport
->dev
, "uart");
1111 if (IS_ERR(clk_uart
)) {
1112 dev_warn(uport
->dev
, "uart%d can't get uart clock\n",
1117 clk_parent
= devm_clk_get(uport
->dev
, "source");
1118 if (IS_ERR(clk_parent
)) {
1119 dev_warn(uport
->dev
, "uart%d can't get source clock\n",
1124 if (!clk_uart
|| clk_set_parent(clk_uart
, clk_parent
))
1125 uport
->uartclk
= SPRD_DEFAULT_SOURCE_CLK
;
1127 uport
->uartclk
= clk_get_rate(clk_uart
);
1129 u
->clk
= devm_clk_get(uport
->dev
, "enable");
1130 if (IS_ERR(u
->clk
)) {
1131 if (PTR_ERR(u
->clk
) == -EPROBE_DEFER
)
1132 return -EPROBE_DEFER
;
1134 dev_warn(uport
->dev
, "uart%d can't get enable clock\n",
1137 /* To keep console alive even if the error occurred */
1138 if (!sprd_uart_is_console(uport
))
1139 return PTR_ERR(u
->clk
);
1147 static int sprd_probe(struct platform_device
*pdev
)
1149 struct resource
*res
;
1150 struct uart_port
*up
;
1151 struct sprd_uart_port
*sport
;
1156 index
= of_alias_get_id(pdev
->dev
.of_node
, "serial");
1157 if (index
< 0 || index
>= UART_NR_MAX
) {
1158 dev_err(&pdev
->dev
, "got a wrong serial alias id %d\n", index
);
1162 sport
= devm_kzalloc(&pdev
->dev
, sizeof(*sport
), GFP_KERNEL
);
1167 up
->dev
= &pdev
->dev
;
1169 up
->type
= PORT_SPRD
;
1170 up
->iotype
= UPIO_MEM
;
1171 up
->uartclk
= SPRD_DEF_RATE
;
1172 up
->fifosize
= SPRD_FIFO_SIZE
;
1173 up
->ops
= &serial_sprd_ops
;
1174 up
->flags
= UPF_BOOT_AUTOCONF
;
1175 up
->has_sysrq
= IS_ENABLED(CONFIG_SERIAL_SPRD_CONSOLE
);
1177 ret
= sprd_clk_init(up
);
1181 up
->membase
= devm_platform_get_and_ioremap_resource(pdev
, 0, &res
);
1182 if (IS_ERR(up
->membase
))
1183 return PTR_ERR(up
->membase
);
1185 up
->mapbase
= res
->start
;
1187 irq
= platform_get_irq(pdev
, 0);
1193 * Allocate one dma buffer to prepare for receive transfer, in case
1194 * memory allocation failure at runtime.
1196 ret
= sprd_rx_alloc_buf(sport
);
1200 if (!sprd_ports_num
) {
1201 ret
= uart_register_driver(&sprd_uart_driver
);
1203 pr_err("Failed to register SPRD-UART driver\n");
1209 sprd_port
[index
] = sport
;
1211 ret
= uart_add_one_port(&sprd_uart_driver
, up
);
1215 platform_set_drvdata(pdev
, up
);
1220 sprd_port
[index
] = NULL
;
1221 if (--sprd_ports_num
== 0)
1222 uart_unregister_driver(&sprd_uart_driver
);
1224 sprd_rx_free_buf(sport
);
1228 #ifdef CONFIG_PM_SLEEP
1229 static int sprd_suspend(struct device
*dev
)
1231 struct sprd_uart_port
*sup
= dev_get_drvdata(dev
);
1233 uart_suspend_port(&sprd_uart_driver
, &sup
->port
);
1238 static int sprd_resume(struct device
*dev
)
1240 struct sprd_uart_port
*sup
= dev_get_drvdata(dev
);
1242 uart_resume_port(&sprd_uart_driver
, &sup
->port
);
1248 static SIMPLE_DEV_PM_OPS(sprd_pm_ops
, sprd_suspend
, sprd_resume
);
1250 static const struct of_device_id serial_ids
[] = {
1251 {.compatible
= "sprd,sc9836-uart",},
1254 MODULE_DEVICE_TABLE(of
, serial_ids
);
1256 static struct platform_driver sprd_platform_driver
= {
1257 .probe
= sprd_probe
,
1258 .remove_new
= sprd_remove
,
1260 .name
= "sprd_serial",
1261 .of_match_table
= serial_ids
,
1266 module_platform_driver(sprd_platform_driver
);
1268 MODULE_LICENSE("GPL v2");
1269 MODULE_DESCRIPTION("Spreadtrum SoC serial driver series");