1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header is for implementations of dma_map_ops and related code.
4 * It should not be included in drivers just using the DMA API.
6 #ifndef _LINUX_DMA_MAP_OPS_H
7 #define _LINUX_DMA_MAP_OPS_H
9 #include <linux/dma-mapping.h>
10 #include <linux/pgtable.h>
11 #include <linux/slab.h>
17 void *(*alloc
)(struct device
*dev
, size_t size
,
18 dma_addr_t
*dma_handle
, gfp_t gfp
,
20 void (*free
)(struct device
*dev
, size_t size
, void *vaddr
,
21 dma_addr_t dma_handle
, unsigned long attrs
);
22 struct page
*(*alloc_pages_op
)(struct device
*dev
, size_t size
,
23 dma_addr_t
*dma_handle
, enum dma_data_direction dir
,
25 void (*free_pages
)(struct device
*dev
, size_t size
, struct page
*vaddr
,
26 dma_addr_t dma_handle
, enum dma_data_direction dir
);
27 int (*mmap
)(struct device
*, struct vm_area_struct
*,
28 void *, dma_addr_t
, size_t, unsigned long attrs
);
30 int (*get_sgtable
)(struct device
*dev
, struct sg_table
*sgt
,
31 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
34 dma_addr_t (*map_page
)(struct device
*dev
, struct page
*page
,
35 unsigned long offset
, size_t size
,
36 enum dma_data_direction dir
, unsigned long attrs
);
37 void (*unmap_page
)(struct device
*dev
, dma_addr_t dma_handle
,
38 size_t size
, enum dma_data_direction dir
,
41 * map_sg should return a negative error code on error. See
42 * dma_map_sgtable() for a list of appropriate error codes
45 int (*map_sg
)(struct device
*dev
, struct scatterlist
*sg
, int nents
,
46 enum dma_data_direction dir
, unsigned long attrs
);
47 void (*unmap_sg
)(struct device
*dev
, struct scatterlist
*sg
, int nents
,
48 enum dma_data_direction dir
, unsigned long attrs
);
49 dma_addr_t (*map_resource
)(struct device
*dev
, phys_addr_t phys_addr
,
50 size_t size
, enum dma_data_direction dir
,
52 void (*unmap_resource
)(struct device
*dev
, dma_addr_t dma_handle
,
53 size_t size
, enum dma_data_direction dir
,
55 void (*sync_single_for_cpu
)(struct device
*dev
, dma_addr_t dma_handle
,
56 size_t size
, enum dma_data_direction dir
);
57 void (*sync_single_for_device
)(struct device
*dev
,
58 dma_addr_t dma_handle
, size_t size
,
59 enum dma_data_direction dir
);
60 void (*sync_sg_for_cpu
)(struct device
*dev
, struct scatterlist
*sg
,
61 int nents
, enum dma_data_direction dir
);
62 void (*sync_sg_for_device
)(struct device
*dev
, struct scatterlist
*sg
,
63 int nents
, enum dma_data_direction dir
);
64 void (*cache_sync
)(struct device
*dev
, void *vaddr
, size_t size
,
65 enum dma_data_direction direction
);
66 int (*dma_supported
)(struct device
*dev
, u64 mask
);
67 u64 (*get_required_mask
)(struct device
*dev
);
68 size_t (*max_mapping_size
)(struct device
*dev
);
69 size_t (*opt_mapping_size
)(void);
70 unsigned long (*get_merge_boundary
)(struct device
*dev
);
73 #ifdef CONFIG_ARCH_HAS_DMA_OPS
74 #include <asm/dma-mapping.h>
76 static inline const struct dma_map_ops
*get_dma_ops(struct device
*dev
)
80 return get_arch_dma_ops();
83 static inline void set_dma_ops(struct device
*dev
,
84 const struct dma_map_ops
*dma_ops
)
86 dev
->dma_ops
= dma_ops
;
88 #else /* CONFIG_ARCH_HAS_DMA_OPS */
89 static inline const struct dma_map_ops
*get_dma_ops(struct device
*dev
)
93 static inline void set_dma_ops(struct device
*dev
,
94 const struct dma_map_ops
*dma_ops
)
97 #endif /* CONFIG_ARCH_HAS_DMA_OPS */
100 extern struct cma
*dma_contiguous_default_area
;
102 static inline struct cma
*dev_get_cma_area(struct device
*dev
)
104 if (dev
&& dev
->cma_area
)
105 return dev
->cma_area
;
106 return dma_contiguous_default_area
;
109 void dma_contiguous_reserve(phys_addr_t addr_limit
);
110 int __init
dma_contiguous_reserve_area(phys_addr_t size
, phys_addr_t base
,
111 phys_addr_t limit
, struct cma
**res_cma
, bool fixed
);
113 struct page
*dma_alloc_from_contiguous(struct device
*dev
, size_t count
,
114 unsigned int order
, bool no_warn
);
115 bool dma_release_from_contiguous(struct device
*dev
, struct page
*pages
,
117 struct page
*dma_alloc_contiguous(struct device
*dev
, size_t size
, gfp_t gfp
);
118 void dma_free_contiguous(struct device
*dev
, struct page
*page
, size_t size
);
120 void dma_contiguous_early_fixup(phys_addr_t base
, unsigned long size
);
121 #else /* CONFIG_DMA_CMA */
122 static inline struct cma
*dev_get_cma_area(struct device
*dev
)
126 static inline void dma_contiguous_reserve(phys_addr_t limit
)
129 static inline int dma_contiguous_reserve_area(phys_addr_t size
,
130 phys_addr_t base
, phys_addr_t limit
, struct cma
**res_cma
,
135 static inline struct page
*dma_alloc_from_contiguous(struct device
*dev
,
136 size_t count
, unsigned int order
, bool no_warn
)
140 static inline bool dma_release_from_contiguous(struct device
*dev
,
141 struct page
*pages
, int count
)
145 /* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
146 static inline struct page
*dma_alloc_contiguous(struct device
*dev
, size_t size
,
151 static inline void dma_free_contiguous(struct device
*dev
, struct page
*page
,
154 __free_pages(page
, get_order(size
));
156 #endif /* CONFIG_DMA_CMA*/
158 #ifdef CONFIG_DMA_DECLARE_COHERENT
159 int dma_declare_coherent_memory(struct device
*dev
, phys_addr_t phys_addr
,
160 dma_addr_t device_addr
, size_t size
);
161 void dma_release_coherent_memory(struct device
*dev
);
162 int dma_alloc_from_dev_coherent(struct device
*dev
, ssize_t size
,
163 dma_addr_t
*dma_handle
, void **ret
);
164 int dma_release_from_dev_coherent(struct device
*dev
, int order
, void *vaddr
);
165 int dma_mmap_from_dev_coherent(struct device
*dev
, struct vm_area_struct
*vma
,
166 void *cpu_addr
, size_t size
, int *ret
);
168 static inline int dma_declare_coherent_memory(struct device
*dev
,
169 phys_addr_t phys_addr
, dma_addr_t device_addr
, size_t size
)
174 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
175 #define dma_release_from_dev_coherent(dev, order, vaddr) (0)
176 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
177 static inline void dma_release_coherent_memory(struct device
*dev
) { }
178 #endif /* CONFIG_DMA_DECLARE_COHERENT */
180 #ifdef CONFIG_DMA_GLOBAL_POOL
181 void *dma_alloc_from_global_coherent(struct device
*dev
, ssize_t size
,
182 dma_addr_t
*dma_handle
);
183 int dma_release_from_global_coherent(int order
, void *vaddr
);
184 int dma_mmap_from_global_coherent(struct vm_area_struct
*vma
, void *cpu_addr
,
185 size_t size
, int *ret
);
186 int dma_init_global_coherent(phys_addr_t phys_addr
, size_t size
);
188 static inline void *dma_alloc_from_global_coherent(struct device
*dev
,
189 ssize_t size
, dma_addr_t
*dma_handle
)
193 static inline int dma_release_from_global_coherent(int order
, void *vaddr
)
197 static inline int dma_mmap_from_global_coherent(struct vm_area_struct
*vma
,
198 void *cpu_addr
, size_t size
, int *ret
)
202 #endif /* CONFIG_DMA_GLOBAL_POOL */
204 int dma_common_get_sgtable(struct device
*dev
, struct sg_table
*sgt
,
205 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
206 unsigned long attrs
);
207 int dma_common_mmap(struct device
*dev
, struct vm_area_struct
*vma
,
208 void *cpu_addr
, dma_addr_t dma_addr
, size_t size
,
209 unsigned long attrs
);
210 struct page
*dma_common_alloc_pages(struct device
*dev
, size_t size
,
211 dma_addr_t
*dma_handle
, enum dma_data_direction dir
, gfp_t gfp
);
212 void dma_common_free_pages(struct device
*dev
, size_t size
, struct page
*vaddr
,
213 dma_addr_t dma_handle
, enum dma_data_direction dir
);
215 struct page
**dma_common_find_pages(void *cpu_addr
);
216 void *dma_common_contiguous_remap(struct page
*page
, size_t size
, pgprot_t prot
,
218 void *dma_common_pages_remap(struct page
**pages
, size_t size
, pgprot_t prot
,
220 void dma_common_free_remap(void *cpu_addr
, size_t size
);
222 struct page
*dma_alloc_from_pool(struct device
*dev
, size_t size
,
223 void **cpu_addr
, gfp_t flags
,
224 bool (*phys_addr_ok
)(struct device
*, phys_addr_t
, size_t));
225 bool dma_free_from_pool(struct device
*dev
, void *start
, size_t size
);
227 int dma_direct_set_offset(struct device
*dev
, phys_addr_t cpu_start
,
228 dma_addr_t dma_start
, u64 size
);
230 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
231 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
232 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
233 extern bool dma_default_coherent
;
234 static inline bool dev_is_dma_coherent(struct device
*dev
)
236 return dev
->dma_coherent
;
239 #define dma_default_coherent true
241 static inline bool dev_is_dma_coherent(struct device
*dev
)
247 static inline void dma_reset_need_sync(struct device
*dev
)
249 #ifdef CONFIG_DMA_NEED_SYNC
250 /* Reset it only once so that the function can be called on hotpath */
251 if (unlikely(dev
->dma_skip_sync
))
252 dev
->dma_skip_sync
= false;
257 * Check whether potential kmalloc() buffers are safe for non-coherent DMA.
259 static inline bool dma_kmalloc_safe(struct device
*dev
,
260 enum dma_data_direction dir
)
263 * If DMA bouncing of kmalloc() buffers is disabled, the kmalloc()
264 * caches have already been aligned to a DMA-safe size.
266 if (!IS_ENABLED(CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC
))
270 * kmalloc() buffers are DMA-safe irrespective of size if the device
271 * is coherent or the direction is DMA_TO_DEVICE (non-desctructive
272 * cache maintenance and benign cache line evictions).
274 if (dev_is_dma_coherent(dev
) || dir
== DMA_TO_DEVICE
)
281 * Check whether the given size, assuming it is for a kmalloc()'ed buffer, is
282 * sufficiently aligned for non-coherent DMA.
284 static inline bool dma_kmalloc_size_aligned(size_t size
)
287 * Larger kmalloc() sizes are guaranteed to be aligned to
290 if (size
>= 2 * ARCH_DMA_MINALIGN
||
291 IS_ALIGNED(kmalloc_size_roundup(size
), dma_get_cache_alignment()))
298 * Check whether the given object size may have originated from a kmalloc()
299 * buffer with a slab alignment below the DMA-safe alignment and needs
300 * bouncing for non-coherent DMA. The pointer alignment is not considered and
301 * in-structure DMA-safe offsets are the responsibility of the caller. Such
302 * code should use the static ARCH_DMA_MINALIGN for compiler annotations.
304 * The heuristics can have false positives, bouncing unnecessarily, though the
305 * buffers would be small. False negatives are theoretically possible if, for
306 * example, multiple small kmalloc() buffers are coalesced into a larger
307 * buffer that passes the alignment check. There are no such known constructs
310 static inline bool dma_kmalloc_needs_bounce(struct device
*dev
, size_t size
,
311 enum dma_data_direction dir
)
313 return !dma_kmalloc_safe(dev
, dir
) && !dma_kmalloc_size_aligned(size
);
316 void *arch_dma_alloc(struct device
*dev
, size_t size
, dma_addr_t
*dma_handle
,
317 gfp_t gfp
, unsigned long attrs
);
318 void arch_dma_free(struct device
*dev
, size_t size
, void *cpu_addr
,
319 dma_addr_t dma_addr
, unsigned long attrs
);
321 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
322 void arch_dma_set_mask(struct device
*dev
, u64 mask
);
324 #define arch_dma_set_mask(dev, mask) do { } while (0)
329 * Page protection so that devices that can't snoop CPU caches can use the
330 * memory coherently. We default to pgprot_noncached which is usually used
331 * for ioremap as a safe bet, but architectures can override this with less
332 * strict semantics if possible.
334 #ifndef pgprot_dmacoherent
335 #define pgprot_dmacoherent(prot) pgprot_noncached(prot)
338 pgprot_t
dma_pgprot(struct device
*dev
, pgprot_t prot
, unsigned long attrs
);
340 static inline pgprot_t
dma_pgprot(struct device
*dev
, pgprot_t prot
,
343 return prot
; /* no protection bits supported without page tables */
345 #endif /* CONFIG_MMU */
347 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
348 void arch_sync_dma_for_device(phys_addr_t paddr
, size_t size
,
349 enum dma_data_direction dir
);
351 static inline void arch_sync_dma_for_device(phys_addr_t paddr
, size_t size
,
352 enum dma_data_direction dir
)
355 #endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */
357 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
358 void arch_sync_dma_for_cpu(phys_addr_t paddr
, size_t size
,
359 enum dma_data_direction dir
);
361 static inline void arch_sync_dma_for_cpu(phys_addr_t paddr
, size_t size
,
362 enum dma_data_direction dir
)
365 #endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */
367 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
368 void arch_sync_dma_for_cpu_all(void);
370 static inline void arch_sync_dma_for_cpu_all(void)
373 #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
375 #ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
376 void arch_dma_prep_coherent(struct page
*page
, size_t size
);
378 static inline void arch_dma_prep_coherent(struct page
*page
, size_t size
)
381 #endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
383 #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN
384 void arch_dma_mark_clean(phys_addr_t paddr
, size_t size
);
386 static inline void arch_dma_mark_clean(phys_addr_t paddr
, size_t size
)
389 #endif /* ARCH_HAS_DMA_MARK_CLEAN */
391 void *arch_dma_set_uncached(void *addr
, size_t size
);
392 void arch_dma_clear_uncached(void *addr
, size_t size
);
394 #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
395 bool arch_dma_map_page_direct(struct device
*dev
, phys_addr_t addr
);
396 bool arch_dma_unmap_page_direct(struct device
*dev
, dma_addr_t dma_handle
);
397 bool arch_dma_map_sg_direct(struct device
*dev
, struct scatterlist
*sg
,
399 bool arch_dma_unmap_sg_direct(struct device
*dev
, struct scatterlist
*sg
,
402 #define arch_dma_map_page_direct(d, a) (false)
403 #define arch_dma_unmap_page_direct(d, a) (false)
404 #define arch_dma_map_sg_direct(d, s, n) (false)
405 #define arch_dma_unmap_sg_direct(d, s, n) (false)
408 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
409 void arch_setup_dma_ops(struct device
*dev
, bool coherent
);
411 static inline void arch_setup_dma_ops(struct device
*dev
, bool coherent
)
414 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
416 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
417 void arch_teardown_dma_ops(struct device
*dev
);
419 static inline void arch_teardown_dma_ops(struct device
*dev
)
422 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
424 #ifdef CONFIG_DMA_API_DEBUG
425 void dma_debug_add_bus(const struct bus_type
*bus
);
426 void debug_dma_dump_mappings(struct device
*dev
);
428 static inline void dma_debug_add_bus(const struct bus_type
*bus
)
431 static inline void debug_dma_dump_mappings(struct device
*dev
)
434 #endif /* CONFIG_DMA_API_DEBUG */
436 extern const struct dma_map_ops dma_dummy_ops
;
438 enum pci_p2pdma_map_type
{
440 * PCI_P2PDMA_MAP_UNKNOWN: Used internally for indicating the mapping
441 * type hasn't been calculated yet. Functions that return this enum
442 * never return this value.
444 PCI_P2PDMA_MAP_UNKNOWN
= 0,
447 * PCI_P2PDMA_MAP_NOT_SUPPORTED: Indicates the transaction will
448 * traverse the host bridge and the host bridge is not in the
449 * allowlist. DMA Mapping routines should return an error when
452 PCI_P2PDMA_MAP_NOT_SUPPORTED
,
455 * PCI_P2PDMA_BUS_ADDR: Indicates that two devices can talk to
456 * each other directly through a PCI switch and the transaction will
457 * not traverse the host bridge. Such a mapping should program
458 * the DMA engine with PCI bus addresses.
460 PCI_P2PDMA_MAP_BUS_ADDR
,
463 * PCI_P2PDMA_MAP_THRU_HOST_BRIDGE: Indicates two devices can talk
464 * to each other, but the transaction traverses a host bridge on the
465 * allowlist. In this case, a normal mapping either with CPU physical
466 * addresses (in the case of dma-direct) or IOVA addresses (in the
467 * case of IOMMUs) should be used to program the DMA engine.
469 PCI_P2PDMA_MAP_THRU_HOST_BRIDGE
,
472 struct pci_p2pdma_map_state
{
473 struct dev_pagemap
*pgmap
;
478 #ifdef CONFIG_PCI_P2PDMA
479 enum pci_p2pdma_map_type
480 pci_p2pdma_map_segment(struct pci_p2pdma_map_state
*state
, struct device
*dev
,
481 struct scatterlist
*sg
);
482 #else /* CONFIG_PCI_P2PDMA */
483 static inline enum pci_p2pdma_map_type
484 pci_p2pdma_map_segment(struct pci_p2pdma_map_state
*state
, struct device
*dev
,
485 struct scatterlist
*sg
)
487 return PCI_P2PDMA_MAP_NOT_SUPPORTED
;
489 #endif /* CONFIG_PCI_P2PDMA */
491 #endif /* _LINUX_DMA_MAP_OPS_H */