include/linux/intel_vsec.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _INTEL_VSEC_H
   3 #define _INTEL_VSEC_H
   4
   5 #include <linux/auxiliary_bus.h>
   6 #include <linux/bits.h>
   7
   8 #define VSEC_CAP_TELEMETRY      BIT(0)
   9 #define VSEC_CAP_WATCHER        BIT(1)
  10 #define VSEC_CAP_CRASHLOG       BIT(2)
  11 #define VSEC_CAP_SDSI           BIT(3)
  12 #define VSEC_CAP_TPMI           BIT(4)
  13
  14 /* Intel DVSEC offsets */
  15 #define INTEL_DVSEC_ENTRIES             0xA
  16 #define INTEL_DVSEC_SIZE                0xB
  17 #define INTEL_DVSEC_TABLE               0xC
  18 #define INTEL_DVSEC_TABLE_BAR(x)        ((x) & GENMASK(2, 0))
  19 #define INTEL_DVSEC_TABLE_OFFSET(x)     ((x) & GENMASK(31, 3))
  20 #define TABLE_OFFSET_SHIFT              3
  21
  22 struct pci_dev;
  23 struct resource;
  24
  25 enum intel_vsec_id {
  26         VSEC_ID_TELEMETRY       = 2,
  27         VSEC_ID_WATCHER         = 3,
  28         VSEC_ID_CRASHLOG        = 4,
  29         VSEC_ID_SDSI            = 65,
  30         VSEC_ID_TPMI            = 66,
  31 };
  32
  33 /**
  34  * struct intel_vsec_header - Common fields of Intel VSEC and DVSEC registers.
  35  * @rev:         Revision ID of the VSEC/DVSEC register space
  36  * @length:      Length of the VSEC/DVSEC register space
  37  * @id:          ID of the feature
  38  * @num_entries: Number of instances of the feature
  39  * @entry_size:  Size of the discovery table for each feature
  40  * @tbir:        BAR containing the discovery tables
  41  * @offset:      BAR offset of start of the first discovery table
  42  */
  43 struct intel_vsec_header {
  44         u8      rev;
  45         u16     length;
  46         u16     id;
  47         u8      num_entries;
  48         u8      entry_size;
  49         u8      tbir;
  50         u32     offset;
  51 };
  52
  53 enum intel_vsec_quirks {
  54         /* Watcher feature not supported */
  55         VSEC_QUIRK_NO_WATCHER   = BIT(0),
  56
  57         /* Crashlog feature not supported */
  58         VSEC_QUIRK_NO_CRASHLOG  = BIT(1),
  59
  60         /* Use shift instead of mask to read discovery table offset */
  61         VSEC_QUIRK_TABLE_SHIFT  = BIT(2),
  62
  63         /* DVSEC not present (provided in driver data) */
  64         VSEC_QUIRK_NO_DVSEC     = BIT(3),
  65
  66         /* Platforms requiring quirk in the auxiliary driver */
  67         VSEC_QUIRK_EARLY_HW     = BIT(4),
  68 };
  69
  70 /**
  71  * struct pmt_callbacks - Callback infrastructure for PMT devices
  72  * ->read_telem() when specified, called by client driver to access PMT data (instead
  73  * of direct copy).
  74  * @pdev:  PCI device reference for the callback's use
  75  * @guid:  ID of data to acccss
  76  * @data:  buffer for the data to be copied
  77  * @off:   offset into the requested buffer
  78  * @count: size of buffer
  79  */
  80 struct pmt_callbacks {
  81         int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off, u32 count);
  82 };
  83
  84 /**
  85  * struct intel_vsec_platform_info - Platform specific data
  86  * @parent:    parent device in the auxbus chain
  87  * @headers:   list of headers to define the PMT client devices to create
  88  * @priv_data: private data, usable by parent devices, currently a callback
  89  * @caps:      bitmask of PMT capabilities for the given headers
  90  * @quirks:    bitmask of VSEC device quirks
  91  * @base_addr: allow a base address to be specified (rather than derived)
  92  */
  93 struct intel_vsec_platform_info {
  94         struct device *parent;
  95         struct intel_vsec_header **headers;
  96         void *priv_data;
  97         unsigned long caps;
  98         unsigned long quirks;
  99         u64 base_addr;
 100 };
 101
 102 /**
 103  * struct intel_sec_device - Auxbus specific device information
 104  * @auxdev:        auxbus device struct for auxbus access
 105  * @pcidev:        pci device associated with the device
 106  * @resource:      any resources shared by the parent
 107  * @ida:           id reference
 108  * @num_resources: number of resources
 109  * @id:            xarray id
 110  * @priv_data:     any private data needed
 111  * @quirks:        specified quirks
 112  * @base_addr:     base address of entries (if specified)
 113  */
 114 struct intel_vsec_device {
 115         struct auxiliary_device auxdev;
 116         struct pci_dev *pcidev;
 117         struct resource *resource;
 118         struct ida *ida;
 119         int num_resources;
 120         int id; /* xa */
 121         void *priv_data;
 122         size_t priv_data_size;
 123         unsigned long quirks;
 124         u64 base_addr;
 125 };
 126
 127 int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent,
 128                        struct intel_vsec_device *intel_vsec_dev,
 129                        const char *name);
 130
 131 static inline struct intel_vsec_device *dev_to_ivdev(struct device *dev)
 132 {
 133         return container_of(dev, struct intel_vsec_device, auxdev.dev);
 134 }
 135
 136 static inline struct intel_vsec_device *auxdev_to_ivdev(struct auxiliary_device *auxdev)
 137 {
 138         return container_of(auxdev, struct intel_vsec_device, auxdev);
 139 }
 140
 141 #if IS_ENABLED(CONFIG_INTEL_VSEC)
 142 void intel_vsec_register(struct pci_dev *pdev,
 143                          struct intel_vsec_platform_info *info);
 144 #else
 145 static inline void intel_vsec_register(struct pci_dev *pdev,
 146                                        struct intel_vsec_platform_info *info)
 147 {
 148 }
 149 #endif
 150 #endif