include/linux/qed/fcoe_common.h

   1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
   2 /* QLogic qed NIC Driver
   3  * Copyright (c) 2015 QLogic Corporation
   4  * Copyright (c) 2019-2020 Marvell International Ltd.
   5  */
   6
   7 #ifndef __FCOE_COMMON__
   8 #define __FCOE_COMMON__
   9
  10 /*********************/
  11 /* FCOE FW CONSTANTS */
  12 /*********************/
  13
  14 #define FC_ABTS_REPLY_MAX_PAYLOAD_LEN   12
  15
  16 /* The fcoe storm task context protection-information of Ystorm */
  17 struct protection_info_ctx {
  18         __le16 flags;
  19 #define PROTECTION_INFO_CTX_HOST_INTERFACE_MASK         0x3
  20 #define PROTECTION_INFO_CTX_HOST_INTERFACE_SHIFT        0
  21 #define PROTECTION_INFO_CTX_DIF_TO_PEER_MASK            0x1
  22 #define PROTECTION_INFO_CTX_DIF_TO_PEER_SHIFT           2
  23 #define PROTECTION_INFO_CTX_VALIDATE_DIX_APP_TAG_MASK   0x1
  24 #define PROTECTION_INFO_CTX_VALIDATE_DIX_APP_TAG_SHIFT  3
  25 #define PROTECTION_INFO_CTX_INTERVAL_SIZE_LOG_MASK      0xF
  26 #define PROTECTION_INFO_CTX_INTERVAL_SIZE_LOG_SHIFT     4
  27 #define PROTECTION_INFO_CTX_VALIDATE_DIX_REF_TAG_MASK   0x1
  28 #define PROTECTION_INFO_CTX_VALIDATE_DIX_REF_TAG_SHIFT  8
  29 #define PROTECTION_INFO_CTX_RESERVED0_MASK              0x7F
  30 #define PROTECTION_INFO_CTX_RESERVED0_SHIFT             9
  31         u8 dix_block_size;
  32         u8 dst_size;
  33 };
  34
  35 /* The fcoe storm task context protection-information of Ystorm */
  36 union protection_info_union_ctx {
  37         struct protection_info_ctx info;
  38         __le32 value;
  39 };
  40
  41 /* FCP CMD payload */
  42 struct fcoe_fcp_cmd_payload {
  43         __le32 opaque[8];
  44 };
  45
  46 /* FCP RSP payload */
  47 struct fcoe_fcp_rsp_payload {
  48         __le32 opaque[6];
  49 };
  50
  51 /* FCP RSP payload */
  52 struct fcp_rsp_payload_padded {
  53         struct fcoe_fcp_rsp_payload rsp_payload;
  54         __le32 reserved[2];
  55 };
  56
  57 /* FCP RSP payload */
  58 struct fcoe_fcp_xfer_payload {
  59         __le32 opaque[3];
  60 };
  61
  62 /* FCP RSP payload */
  63 struct fcp_xfer_payload_padded {
  64         struct fcoe_fcp_xfer_payload xfer_payload;
  65         __le32 reserved[5];
  66 };
  67
  68 /* Task params */
  69 struct fcoe_tx_data_params {
  70         __le32 data_offset;
  71         __le32 offset_in_io;
  72         u8 flags;
  73 #define FCOE_TX_DATA_PARAMS_OFFSET_IN_IO_VALID_MASK     0x1
  74 #define FCOE_TX_DATA_PARAMS_OFFSET_IN_IO_VALID_SHIFT    0
  75 #define FCOE_TX_DATA_PARAMS_DROP_DATA_MASK              0x1
  76 #define FCOE_TX_DATA_PARAMS_DROP_DATA_SHIFT             1
  77 #define FCOE_TX_DATA_PARAMS_AFTER_SEQ_REC_MASK          0x1
  78 #define FCOE_TX_DATA_PARAMS_AFTER_SEQ_REC_SHIFT         2
  79 #define FCOE_TX_DATA_PARAMS_RESERVED0_MASK              0x1F
  80 #define FCOE_TX_DATA_PARAMS_RESERVED0_SHIFT             3
  81         u8 dif_residual;
  82         __le16 seq_cnt;
  83         __le16 single_sge_saved_offset;
  84         __le16 next_dif_offset;
  85         __le16 seq_id;
  86         __le16 reserved3;
  87 };
  88
  89 /* Middle path parameters: FC header fields provided by the driver */
  90 struct fcoe_tx_mid_path_params {
  91         __le32 parameter;
  92         u8 r_ctl;
  93         u8 type;
  94         u8 cs_ctl;
  95         u8 df_ctl;
  96         __le16 rx_id;
  97         __le16 ox_id;
  98 };
  99
 100 /* Task params */
 101 struct fcoe_tx_params {
 102         struct fcoe_tx_data_params data;
 103         struct fcoe_tx_mid_path_params mid_path;
 104 };
 105
 106 /* Union of FCP CMD payload \ TX params \ ABTS \ Cleanup */
 107 union fcoe_tx_info_union_ctx {
 108         struct fcoe_fcp_cmd_payload fcp_cmd_payload;
 109         struct fcp_rsp_payload_padded fcp_rsp_payload;
 110         struct fcp_xfer_payload_padded fcp_xfer_payload;
 111         struct fcoe_tx_params tx_params;
 112 };
 113
 114 /* Data sgl */
 115 struct fcoe_slow_sgl_ctx {
 116         struct regpair base_sgl_addr;
 117         __le16 curr_sge_off;
 118         __le16 remainder_num_sges;
 119         __le16 curr_sgl_index;
 120         __le16 reserved;
 121 };
 122
 123 /* Union of DIX SGL \ cached DIX sges */
 124 union fcoe_dix_desc_ctx {
 125         struct fcoe_slow_sgl_ctx dix_sgl;
 126         struct scsi_sge cached_dix_sge;
 127 };
 128
 129 /* The fcoe storm task context of Ystorm */
 130 struct ystorm_fcoe_task_st_ctx {
 131         u8 task_type;
 132         u8 sgl_mode;
 133 #define YSTORM_FCOE_TASK_ST_CTX_TX_SGL_MODE_MASK        0x1
 134 #define YSTORM_FCOE_TASK_ST_CTX_TX_SGL_MODE_SHIFT       0
 135 #define YSTORM_FCOE_TASK_ST_CTX_RSRV_MASK               0x7F
 136 #define YSTORM_FCOE_TASK_ST_CTX_RSRV_SHIFT              1
 137         u8 cached_dix_sge;
 138         u8 expect_first_xfer;
 139         __le32 num_pbf_zero_write;
 140         union protection_info_union_ctx protection_info_union;
 141         __le32 data_2_trns_rem;
 142         struct scsi_sgl_params sgl_params;
 143         u8 reserved1[12];
 144         union fcoe_tx_info_union_ctx tx_info_union;
 145         union fcoe_dix_desc_ctx dix_desc;
 146         struct scsi_cached_sges data_desc;
 147         __le16 ox_id;
 148         __le16 rx_id;
 149         __le32 task_rety_identifier;
 150         u8 reserved2[8];
 151 };
 152
 153 struct ystorm_fcoe_task_ag_ctx {
 154         u8 byte0;
 155         u8 byte1;
 156         __le16 word0;
 157         u8 flags0;
 158 #define YSTORM_FCOE_TASK_AG_CTX_NIBBLE0_MASK            0xF
 159 #define YSTORM_FCOE_TASK_AG_CTX_NIBBLE0_SHIFT   0
 160 #define YSTORM_FCOE_TASK_AG_CTX_BIT0_MASK               0x1
 161 #define YSTORM_FCOE_TASK_AG_CTX_BIT0_SHIFT              4
 162 #define YSTORM_FCOE_TASK_AG_CTX_BIT1_MASK               0x1
 163 #define YSTORM_FCOE_TASK_AG_CTX_BIT1_SHIFT              5
 164 #define YSTORM_FCOE_TASK_AG_CTX_BIT2_MASK               0x1
 165 #define YSTORM_FCOE_TASK_AG_CTX_BIT2_SHIFT              6
 166 #define YSTORM_FCOE_TASK_AG_CTX_BIT3_MASK               0x1
 167 #define YSTORM_FCOE_TASK_AG_CTX_BIT3_SHIFT              7
 168         u8 flags1;
 169 #define YSTORM_FCOE_TASK_AG_CTX_CF0_MASK                0x3
 170 #define YSTORM_FCOE_TASK_AG_CTX_CF0_SHIFT               0
 171 #define YSTORM_FCOE_TASK_AG_CTX_CF1_MASK                0x3
 172 #define YSTORM_FCOE_TASK_AG_CTX_CF1_SHIFT               2
 173 #define YSTORM_FCOE_TASK_AG_CTX_CF2SPECIAL_MASK 0x3
 174 #define YSTORM_FCOE_TASK_AG_CTX_CF2SPECIAL_SHIFT        4
 175 #define YSTORM_FCOE_TASK_AG_CTX_CF0EN_MASK              0x1
 176 #define YSTORM_FCOE_TASK_AG_CTX_CF0EN_SHIFT             6
 177 #define YSTORM_FCOE_TASK_AG_CTX_CF1EN_MASK              0x1
 178 #define YSTORM_FCOE_TASK_AG_CTX_CF1EN_SHIFT             7
 179         u8 flags2;
 180 #define YSTORM_FCOE_TASK_AG_CTX_BIT4_MASK               0x1
 181 #define YSTORM_FCOE_TASK_AG_CTX_BIT4_SHIFT              0
 182 #define YSTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK            0x1
 183 #define YSTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT   1
 184 #define YSTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK            0x1
 185 #define YSTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT   2
 186 #define YSTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK            0x1
 187 #define YSTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT   3
 188 #define YSTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK            0x1
 189 #define YSTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT   4
 190 #define YSTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK            0x1
 191 #define YSTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT   5
 192 #define YSTORM_FCOE_TASK_AG_CTX_RULE5EN_MASK            0x1
 193 #define YSTORM_FCOE_TASK_AG_CTX_RULE5EN_SHIFT   6
 194 #define YSTORM_FCOE_TASK_AG_CTX_RULE6EN_MASK            0x1
 195 #define YSTORM_FCOE_TASK_AG_CTX_RULE6EN_SHIFT   7
 196         u8 byte2;
 197         __le32 reg0;
 198         u8 byte3;
 199         u8 byte4;
 200         __le16 rx_id;
 201         __le16 word2;
 202         __le16 word3;
 203         __le16 word4;
 204         __le16 word5;
 205         __le32 reg1;
 206         __le32 reg2;
 207 };
 208
 209 struct tstorm_fcoe_task_ag_ctx {
 210         u8 reserved;
 211         u8 byte1;
 212         __le16 icid;
 213         u8 flags0;
 214 #define TSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_MASK            0xF
 215 #define TSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_SHIFT   0
 216 #define TSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_MASK               0x1
 217 #define TSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_SHIFT              4
 218 #define TSTORM_FCOE_TASK_AG_CTX_BIT1_MASK                       0x1
 219 #define TSTORM_FCOE_TASK_AG_CTX_BIT1_SHIFT                      5
 220 #define TSTORM_FCOE_TASK_AG_CTX_WAIT_ABTS_RSP_F_MASK            0x1
 221 #define TSTORM_FCOE_TASK_AG_CTX_WAIT_ABTS_RSP_F_SHIFT   6
 222 #define TSTORM_FCOE_TASK_AG_CTX_VALID_MASK                      0x1
 223 #define TSTORM_FCOE_TASK_AG_CTX_VALID_SHIFT                     7
 224         u8 flags1;
 225 #define TSTORM_FCOE_TASK_AG_CTX_FALSE_RR_TOV_MASK       0x1
 226 #define TSTORM_FCOE_TASK_AG_CTX_FALSE_RR_TOV_SHIFT      0
 227 #define TSTORM_FCOE_TASK_AG_CTX_BIT5_MASK               0x1
 228 #define TSTORM_FCOE_TASK_AG_CTX_BIT5_SHIFT              1
 229 #define TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_MASK      0x3
 230 #define TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_SHIFT     2
 231 #define TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_MASK  0x3
 232 #define TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_SHIFT 4
 233 #define TSTORM_FCOE_TASK_AG_CTX_CF2_MASK                0x3
 234 #define TSTORM_FCOE_TASK_AG_CTX_CF2_SHIFT               6
 235         u8 flags2;
 236 #define TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_MASK             0x3
 237 #define TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_SHIFT            0
 238 #define TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_MASK              0x3
 239 #define TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_SHIFT             2
 240 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_MASK                0x3
 241 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_SHIFT               4
 242 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_MASK            0x3
 243 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_SHIFT   6
 244         u8 flags3;
 245 #define TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_MASK              0x3
 246 #define TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_SHIFT             0
 247 #define TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_EN_MASK   0x1
 248 #define TSTORM_FCOE_TASK_AG_CTX_REC_RR_TOV_CF_EN_SHIFT  2
 249 #define TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_EN_MASK               0x1
 250 #define TSTORM_FCOE_TASK_AG_CTX_ED_TOV_CF_EN_SHIFT              3
 251 #define TSTORM_FCOE_TASK_AG_CTX_CF2EN_MASK                      0x1
 252 #define TSTORM_FCOE_TASK_AG_CTX_CF2EN_SHIFT                     4
 253 #define TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_EN_MASK  0x1
 254 #define TSTORM_FCOE_TASK_AG_CTX_TIMER_STOP_ALL_EN_SHIFT 5
 255 #define TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_MASK   0x1
 256 #define TSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_SHIFT  6
 257 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_EN_MASK             0x1
 258 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_INIT_CF_EN_SHIFT            7
 259         u8 flags4;
 260 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_EN_MASK 0x1
 261 #define TSTORM_FCOE_TASK_AG_CTX_SEQ_RECOVERY_CF_EN_SHIFT        0
 262 #define TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_EN_MASK   0x1
 263 #define TSTORM_FCOE_TASK_AG_CTX_UNSOL_COMP_CF_EN_SHIFT  1
 264 #define TSTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK                    0x1
 265 #define TSTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT           2
 266 #define TSTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK                    0x1
 267 #define TSTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT           3
 268 #define TSTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK                    0x1
 269 #define TSTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT           4
 270 #define TSTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK                    0x1
 271 #define TSTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT           5
 272 #define TSTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK                    0x1
 273 #define TSTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT           6
 274 #define TSTORM_FCOE_TASK_AG_CTX_RULE5EN_MASK                    0x1
 275 #define TSTORM_FCOE_TASK_AG_CTX_RULE5EN_SHIFT           7
 276         u8 cleanup_state;
 277         __le16 last_sent_tid;
 278         __le32 rec_rr_tov_exp_timeout;
 279         u8 byte3;
 280         u8 byte4;
 281         __le16 word2;
 282         __le16 word3;
 283         __le16 word4;
 284         __le32 data_offset_end_of_seq;
 285         __le32 data_offset_next;
 286 };
 287
 288 /* Cached data sges */
 289 struct fcoe_exp_ro {
 290         __le32 data_offset;
 291         __le32 reserved;
 292 };
 293
 294 /* Union of Cleanup address \ expected relative offsets */
 295 union fcoe_cleanup_addr_exp_ro_union {
 296         struct regpair abts_rsp_fc_payload_hi;
 297         struct fcoe_exp_ro exp_ro;
 298 };
 299
 300 /* Fields coppied from ABTSrsp pckt */
 301 struct fcoe_abts_pkt {
 302         __le32 abts_rsp_fc_payload_lo;
 303         __le16 abts_rsp_rx_id;
 304         u8 abts_rsp_rctl;
 305         u8 reserved2;
 306 };
 307
 308 /* FW read- write (modifyable) part The fcoe task storm context of Tstorm */
 309 struct fcoe_tstorm_fcoe_task_st_ctx_read_write {
 310         union fcoe_cleanup_addr_exp_ro_union cleanup_addr_exp_ro_union;
 311         __le16 flags;
 312 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_RX_SGL_MODE_MASK        0x1
 313 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_RX_SGL_MODE_SHIFT       0
 314 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_EXP_FIRST_FRAME_MASK    0x1
 315 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_EXP_FIRST_FRAME_SHIFT   1
 316 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_SEQ_ACTIVE_MASK         0x1
 317 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_SEQ_ACTIVE_SHIFT        2
 318 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_SEQ_TIMEOUT_MASK        0x1
 319 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_SEQ_TIMEOUT_SHIFT       3
 320 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_SINGLE_PKT_IN_EX_MASK   0x1
 321 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_SINGLE_PKT_IN_EX_SHIFT  4
 322 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_OOO_RX_SEQ_STAT_MASK    0x1
 323 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_OOO_RX_SEQ_STAT_SHIFT   5
 324 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_CQ_ADD_ADV_MASK         0x3
 325 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_CQ_ADD_ADV_SHIFT        6
 326 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_RSRV1_MASK              0xFF
 327 #define FCOE_TSTORM_FCOE_TASK_ST_CTX_READ_WRITE_RSRV1_SHIFT             8
 328         __le16 seq_cnt;
 329         u8 seq_id;
 330         u8 ooo_rx_seq_id;
 331         __le16 rx_id;
 332         struct fcoe_abts_pkt abts_data;
 333         __le32 e_d_tov_exp_timeout_val;
 334         __le16 ooo_rx_seq_cnt;
 335         __le16 reserved1;
 336 };
 337
 338 /* FW read only part The fcoe task storm context of Tstorm */
 339 struct fcoe_tstorm_fcoe_task_st_ctx_read_only {
 340         u8 task_type;
 341         u8 dev_type;
 342         u8 conf_supported;
 343         u8 glbl_q_num;
 344         __le32 cid;
 345         __le32 fcp_cmd_trns_size;
 346         __le32 rsrv;
 347 };
 348
 349 /** The fcoe task storm context of Tstorm */
 350 struct tstorm_fcoe_task_st_ctx {
 351         struct fcoe_tstorm_fcoe_task_st_ctx_read_write read_write;
 352         struct fcoe_tstorm_fcoe_task_st_ctx_read_only read_only;
 353 };
 354
 355 struct mstorm_fcoe_task_ag_ctx {
 356         u8 byte0;
 357         u8 byte1;
 358         __le16 icid;
 359         u8 flags0;
 360 #define MSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_MASK            0xF
 361 #define MSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_SHIFT   0
 362 #define MSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_MASK               0x1
 363 #define MSTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_SHIFT              4
 364 #define MSTORM_FCOE_TASK_AG_CTX_CQE_PLACED_MASK         0x1
 365 #define MSTORM_FCOE_TASK_AG_CTX_CQE_PLACED_SHIFT                5
 366 #define MSTORM_FCOE_TASK_AG_CTX_BIT2_MASK                       0x1
 367 #define MSTORM_FCOE_TASK_AG_CTX_BIT2_SHIFT                      6
 368 #define MSTORM_FCOE_TASK_AG_CTX_BIT3_MASK                       0x1
 369 #define MSTORM_FCOE_TASK_AG_CTX_BIT3_SHIFT                      7
 370         u8 flags1;
 371 #define MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_MASK              0x3
 372 #define MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_SHIFT             0
 373 #define MSTORM_FCOE_TASK_AG_CTX_CF1_MASK                        0x3
 374 #define MSTORM_FCOE_TASK_AG_CTX_CF1_SHIFT                       2
 375 #define MSTORM_FCOE_TASK_AG_CTX_CF2_MASK                        0x3
 376 #define MSTORM_FCOE_TASK_AG_CTX_CF2_SHIFT                       4
 377 #define MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_MASK   0x1
 378 #define MSTORM_FCOE_TASK_AG_CTX_EX_CLEANUP_CF_EN_SHIFT  6
 379 #define MSTORM_FCOE_TASK_AG_CTX_CF1EN_MASK                      0x1
 380 #define MSTORM_FCOE_TASK_AG_CTX_CF1EN_SHIFT                     7
 381         u8 flags2;
 382 #define MSTORM_FCOE_TASK_AG_CTX_CF2EN_MASK                      0x1
 383 #define MSTORM_FCOE_TASK_AG_CTX_CF2EN_SHIFT                     0
 384 #define MSTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK                    0x1
 385 #define MSTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT           1
 386 #define MSTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK                    0x1
 387 #define MSTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT           2
 388 #define MSTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK                    0x1
 389 #define MSTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT           3
 390 #define MSTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK                    0x1
 391 #define MSTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT           4
 392 #define MSTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK                    0x1
 393 #define MSTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT           5
 394 #define MSTORM_FCOE_TASK_AG_CTX_XFER_PLACEMENT_EN_MASK  0x1
 395 #define MSTORM_FCOE_TASK_AG_CTX_XFER_PLACEMENT_EN_SHIFT 6
 396 #define MSTORM_FCOE_TASK_AG_CTX_RULE6EN_MASK                    0x1
 397 #define MSTORM_FCOE_TASK_AG_CTX_RULE6EN_SHIFT           7
 398         u8 cleanup_state;
 399         __le32 received_bytes;
 400         u8 byte3;
 401         u8 glbl_q_num;
 402         __le16 word1;
 403         __le16 tid_to_xfer;
 404         __le16 word3;
 405         __le16 word4;
 406         __le16 word5;
 407         __le32 expected_bytes;
 408         __le32 reg2;
 409 };
 410
 411 /* The fcoe task storm context of Mstorm */
 412 struct mstorm_fcoe_task_st_ctx {
 413         struct regpair rsp_buf_addr;
 414         __le32 rsrv[2];
 415         struct scsi_sgl_params sgl_params;
 416         __le32 data_2_trns_rem;
 417         __le32 data_buffer_offset;
 418         __le16 parent_id;
 419         __le16 flags;
 420 #define MSTORM_FCOE_TASK_ST_CTX_INTERVAL_SIZE_LOG_MASK          0xF
 421 #define MSTORM_FCOE_TASK_ST_CTX_INTERVAL_SIZE_LOG_SHIFT         0
 422 #define MSTORM_FCOE_TASK_ST_CTX_HOST_INTERFACE_MASK             0x3
 423 #define MSTORM_FCOE_TASK_ST_CTX_HOST_INTERFACE_SHIFT            4
 424 #define MSTORM_FCOE_TASK_ST_CTX_DIF_TO_PEER_MASK                0x1
 425 #define MSTORM_FCOE_TASK_ST_CTX_DIF_TO_PEER_SHIFT               6
 426 #define MSTORM_FCOE_TASK_ST_CTX_MP_INCLUDE_FC_HEADER_MASK       0x1
 427 #define MSTORM_FCOE_TASK_ST_CTX_MP_INCLUDE_FC_HEADER_SHIFT      7
 428 #define MSTORM_FCOE_TASK_ST_CTX_DIX_BLOCK_SIZE_MASK             0x3
 429 #define MSTORM_FCOE_TASK_ST_CTX_DIX_BLOCK_SIZE_SHIFT            8
 430 #define MSTORM_FCOE_TASK_ST_CTX_VALIDATE_DIX_REF_TAG_MASK       0x1
 431 #define MSTORM_FCOE_TASK_ST_CTX_VALIDATE_DIX_REF_TAG_SHIFT      10
 432 #define MSTORM_FCOE_TASK_ST_CTX_DIX_CACHED_SGE_FLG_MASK         0x1
 433 #define MSTORM_FCOE_TASK_ST_CTX_DIX_CACHED_SGE_FLG_SHIFT        11
 434 #define MSTORM_FCOE_TASK_ST_CTX_DIF_SUPPORTED_MASK              0x1
 435 #define MSTORM_FCOE_TASK_ST_CTX_DIF_SUPPORTED_SHIFT             12
 436 #define MSTORM_FCOE_TASK_ST_CTX_TX_SGL_MODE_MASK                0x1
 437 #define MSTORM_FCOE_TASK_ST_CTX_TX_SGL_MODE_SHIFT               13
 438 #define MSTORM_FCOE_TASK_ST_CTX_RESERVED_MASK                   0x3
 439 #define MSTORM_FCOE_TASK_ST_CTX_RESERVED_SHIFT                  14
 440         struct scsi_cached_sges data_desc;
 441 };
 442
 443 struct ustorm_fcoe_task_ag_ctx {
 444         u8 reserved;
 445         u8 byte1;
 446         __le16 icid;
 447         u8 flags0;
 448 #define USTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_MASK            0xF
 449 #define USTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE_SHIFT   0
 450 #define USTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_MASK               0x1
 451 #define USTORM_FCOE_TASK_AG_CTX_EXIST_IN_QM0_SHIFT              4
 452 #define USTORM_FCOE_TASK_AG_CTX_BIT1_MASK                       0x1
 453 #define USTORM_FCOE_TASK_AG_CTX_BIT1_SHIFT                      5
 454 #define USTORM_FCOE_TASK_AG_CTX_CF0_MASK                        0x3
 455 #define USTORM_FCOE_TASK_AG_CTX_CF0_SHIFT                       6
 456         u8 flags1;
 457 #define USTORM_FCOE_TASK_AG_CTX_CF1_MASK                0x3
 458 #define USTORM_FCOE_TASK_AG_CTX_CF1_SHIFT               0
 459 #define USTORM_FCOE_TASK_AG_CTX_CF2_MASK                0x3
 460 #define USTORM_FCOE_TASK_AG_CTX_CF2_SHIFT               2
 461 #define USTORM_FCOE_TASK_AG_CTX_CF3_MASK                0x3
 462 #define USTORM_FCOE_TASK_AG_CTX_CF3_SHIFT               4
 463 #define USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_MASK       0x3
 464 #define USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_SHIFT      6
 465         u8 flags2;
 466 #define USTORM_FCOE_TASK_AG_CTX_CF0EN_MASK                      0x1
 467 #define USTORM_FCOE_TASK_AG_CTX_CF0EN_SHIFT                     0
 468 #define USTORM_FCOE_TASK_AG_CTX_CF1EN_MASK                      0x1
 469 #define USTORM_FCOE_TASK_AG_CTX_CF1EN_SHIFT                     1
 470 #define USTORM_FCOE_TASK_AG_CTX_CF2EN_MASK                      0x1
 471 #define USTORM_FCOE_TASK_AG_CTX_CF2EN_SHIFT                     2
 472 #define USTORM_FCOE_TASK_AG_CTX_CF3EN_MASK                      0x1
 473 #define USTORM_FCOE_TASK_AG_CTX_CF3EN_SHIFT                     3
 474 #define USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_EN_MASK            0x1
 475 #define USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_CF_EN_SHIFT   4
 476 #define USTORM_FCOE_TASK_AG_CTX_RULE0EN_MASK                    0x1
 477 #define USTORM_FCOE_TASK_AG_CTX_RULE0EN_SHIFT           5
 478 #define USTORM_FCOE_TASK_AG_CTX_RULE1EN_MASK                    0x1
 479 #define USTORM_FCOE_TASK_AG_CTX_RULE1EN_SHIFT           6
 480 #define USTORM_FCOE_TASK_AG_CTX_RULE2EN_MASK                    0x1
 481 #define USTORM_FCOE_TASK_AG_CTX_RULE2EN_SHIFT           7
 482         u8 flags3;
 483 #define USTORM_FCOE_TASK_AG_CTX_RULE3EN_MASK            0x1
 484 #define USTORM_FCOE_TASK_AG_CTX_RULE3EN_SHIFT   0
 485 #define USTORM_FCOE_TASK_AG_CTX_RULE4EN_MASK            0x1
 486 #define USTORM_FCOE_TASK_AG_CTX_RULE4EN_SHIFT   1
 487 #define USTORM_FCOE_TASK_AG_CTX_RULE5EN_MASK            0x1
 488 #define USTORM_FCOE_TASK_AG_CTX_RULE5EN_SHIFT   2
 489 #define USTORM_FCOE_TASK_AG_CTX_RULE6EN_MASK            0x1
 490 #define USTORM_FCOE_TASK_AG_CTX_RULE6EN_SHIFT   3
 491 #define USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_TYPE_MASK     0xF
 492 #define USTORM_FCOE_TASK_AG_CTX_DIF_ERROR_TYPE_SHIFT    4
 493         __le32 dif_err_intervals;
 494         __le32 dif_error_1st_interval;
 495         __le32 global_cq_num;
 496         __le32 reg3;
 497         __le32 reg4;
 498         __le32 reg5;
 499 };
 500
 501 /* FCoE task context */
 502 struct fcoe_task_context {
 503         struct ystorm_fcoe_task_st_ctx ystorm_st_context;
 504         struct regpair ystorm_st_padding[2];
 505         struct tdif_task_context tdif_context;
 506         struct ystorm_fcoe_task_ag_ctx ystorm_ag_context;
 507         struct tstorm_fcoe_task_ag_ctx tstorm_ag_context;
 508         struct timers_context timer_context;
 509         struct tstorm_fcoe_task_st_ctx tstorm_st_context;
 510         struct regpair tstorm_st_padding[2];
 511         struct mstorm_fcoe_task_ag_ctx mstorm_ag_context;
 512         struct mstorm_fcoe_task_st_ctx mstorm_st_context;
 513         struct ustorm_fcoe_task_ag_ctx ustorm_ag_context;
 514         struct rdif_task_context rdif_context;
 515 };
 516
 517 /* FCoE additional WQE (Sq/XferQ) information */
 518 union fcoe_additional_info_union {
 519         __le32 previous_tid;
 520         __le32 parent_tid;
 521         __le32 burst_length;
 522         __le32 seq_rec_updated_offset;
 523 };
 524
 525 /* FCoE Ramrod Command IDs */
 526 enum fcoe_completion_status {
 527         FCOE_COMPLETION_STATUS_SUCCESS,
 528         FCOE_COMPLETION_STATUS_FCOE_VER_ERR,
 529         FCOE_COMPLETION_STATUS_SRC_MAC_ADD_ARR_ERR,
 530         MAX_FCOE_COMPLETION_STATUS
 531 };
 532
 533 /* FC address (SID/DID) network presentation */
 534 struct fc_addr_nw {
 535         u8 addr_lo;
 536         u8 addr_mid;
 537         u8 addr_hi;
 538 };
 539
 540 /* FCoE connection offload */
 541 struct fcoe_conn_offload_ramrod_data {
 542         struct regpair sq_pbl_addr;
 543         struct regpair sq_curr_page_addr;
 544         struct regpair sq_next_page_addr;
 545         struct regpair xferq_pbl_addr;
 546         struct regpair xferq_curr_page_addr;
 547         struct regpair xferq_next_page_addr;
 548         struct regpair respq_pbl_addr;
 549         struct regpair respq_curr_page_addr;
 550         struct regpair respq_next_page_addr;
 551         __le16 dst_mac_addr_lo;
 552         __le16 dst_mac_addr_mid;
 553         __le16 dst_mac_addr_hi;
 554         __le16 src_mac_addr_lo;
 555         __le16 src_mac_addr_mid;
 556         __le16 src_mac_addr_hi;
 557         __le16 tx_max_fc_pay_len;
 558         __le16 e_d_tov_timer_val;
 559         __le16 rx_max_fc_pay_len;
 560         __le16 vlan_tag;
 561 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_VLAN_ID_MASK      0xFFF
 562 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_VLAN_ID_SHIFT     0
 563 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_CFI_MASK          0x1
 564 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_CFI_SHIFT         12
 565 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_PRIORITY_MASK     0x7
 566 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_PRIORITY_SHIFT    13
 567         __le16 physical_q0;
 568         __le16 rec_rr_tov_timer_val;
 569         struct fc_addr_nw s_id;
 570         u8 max_conc_seqs_c3;
 571         struct fc_addr_nw d_id;
 572         u8 flags;
 573 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_CONT_INCR_SEQ_CNT_MASK  0x1
 574 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_CONT_INCR_SEQ_CNT_SHIFT 0
 575 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_CONF_REQ_MASK           0x1
 576 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_CONF_REQ_SHIFT          1
 577 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_REC_VALID_MASK          0x1
 578 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_REC_VALID_SHIFT         2
 579 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_VLAN_FLAG_MASK          0x1
 580 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_VLAN_FLAG_SHIFT         3
 581 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_SINGLE_VLAN_MASK        0x1
 582 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_B_SINGLE_VLAN_SHIFT       4
 583 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_MODE_MASK                 0x3
 584 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_MODE_SHIFT                5
 585 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_RESERVED0_MASK            0x1
 586 #define FCOE_CONN_OFFLOAD_RAMROD_DATA_RESERVED0_SHIFT           7
 587         __le16 conn_id;
 588         u8 def_q_idx;
 589         u8 reserved[5];
 590 };
 591
 592 /* FCoE terminate connection request */
 593 struct fcoe_conn_terminate_ramrod_data {
 594         struct regpair terminate_params_addr;
 595 };
 596
 597 /* FCoE device type */
 598 enum fcoe_device_type {
 599         FCOE_TASK_DEV_TYPE_DISK,
 600         FCOE_TASK_DEV_TYPE_TAPE,
 601         MAX_FCOE_DEVICE_TYPE
 602 };
 603
 604 /* Data sgl */
 605 struct fcoe_fast_sgl_ctx {
 606         struct regpair sgl_start_addr;
 607         __le32 sgl_byte_offset;
 608         __le16 task_reuse_cnt;
 609         __le16 init_offset_in_first_sge;
 610 };
 611
 612 /* FCoE firmware function init */
 613 struct fcoe_init_func_ramrod_data {
 614         struct scsi_init_func_params func_params;
 615         struct scsi_init_func_queues q_params;
 616         __le16 mtu;
 617         __le16 sq_num_pages_in_pbl;
 618         __le32 reserved[3];
 619 };
 620
 621 /* FCoE: Mode of the connection: Target or Initiator or both */
 622 enum fcoe_mode_type {
 623         FCOE_INITIATOR_MODE = 0x0,
 624         FCOE_TARGET_MODE = 0x1,
 625         FCOE_BOTH_OR_NOT_CHOSEN = 0x3,
 626         MAX_FCOE_MODE_TYPE
 627 };
 628
 629 /* Per PF FCoE receive path statistics - tStorm RAM structure */
 630 struct fcoe_rx_stat {
 631         struct regpair fcoe_rx_byte_cnt;
 632         struct regpair fcoe_rx_data_pkt_cnt;
 633         struct regpair fcoe_rx_xfer_pkt_cnt;
 634         struct regpair fcoe_rx_other_pkt_cnt;
 635         __le32 fcoe_silent_drop_pkt_cmdq_full_cnt;
 636         __le32 fcoe_silent_drop_pkt_rq_full_cnt;
 637         __le32 fcoe_silent_drop_pkt_crc_error_cnt;
 638         __le32 fcoe_silent_drop_pkt_task_invalid_cnt;
 639         __le32 fcoe_silent_drop_total_pkt_cnt;
 640         __le32 rsrv;
 641 };
 642
 643 /* FCoE SQE request type */
 644 enum fcoe_sqe_request_type {
 645         SEND_FCOE_CMD,
 646         SEND_FCOE_MIDPATH,
 647         SEND_FCOE_ABTS_REQUEST,
 648         FCOE_EXCHANGE_CLEANUP,
 649         FCOE_SEQUENCE_RECOVERY,
 650         SEND_FCOE_XFER_RDY,
 651         SEND_FCOE_RSP,
 652         SEND_FCOE_RSP_WITH_SENSE_DATA,
 653         SEND_FCOE_TARGET_DATA,
 654         SEND_FCOE_INITIATOR_DATA,
 655         SEND_FCOE_XFER_CONTINUATION_RDY,
 656         SEND_FCOE_TARGET_ABTS_RSP,
 657         MAX_FCOE_SQE_REQUEST_TYPE
 658 };
 659
 660 /* FCoe statistics request */
 661 struct fcoe_stat_ramrod_data {
 662         struct regpair stat_params_addr;
 663 };
 664
 665 /* FCoE task type */
 666 enum fcoe_task_type {
 667         FCOE_TASK_TYPE_WRITE_INITIATOR,
 668         FCOE_TASK_TYPE_READ_INITIATOR,
 669         FCOE_TASK_TYPE_MIDPATH,
 670         FCOE_TASK_TYPE_UNSOLICITED,
 671         FCOE_TASK_TYPE_ABTS,
 672         FCOE_TASK_TYPE_EXCHANGE_CLEANUP,
 673         FCOE_TASK_TYPE_SEQUENCE_CLEANUP,
 674         FCOE_TASK_TYPE_WRITE_TARGET,
 675         FCOE_TASK_TYPE_READ_TARGET,
 676         FCOE_TASK_TYPE_RSP,
 677         FCOE_TASK_TYPE_RSP_SENSE_DATA,
 678         FCOE_TASK_TYPE_ABTS_TARGET,
 679         FCOE_TASK_TYPE_ENUM_SIZE,
 680         MAX_FCOE_TASK_TYPE
 681 };
 682
 683 /* Per PF FCoE transmit path statistics - pStorm RAM structure */
 684 struct fcoe_tx_stat {
 685         struct regpair fcoe_tx_byte_cnt;
 686         struct regpair fcoe_tx_data_pkt_cnt;
 687         struct regpair fcoe_tx_xfer_pkt_cnt;
 688         struct regpair fcoe_tx_other_pkt_cnt;
 689 };
 690
 691 /* FCoE SQ/XferQ element */
 692 struct fcoe_wqe {
 693         __le16 task_id;
 694         __le16 flags;
 695 #define FCOE_WQE_REQ_TYPE_MASK          0xF
 696 #define FCOE_WQE_REQ_TYPE_SHIFT         0
 697 #define FCOE_WQE_SGL_MODE_MASK          0x1
 698 #define FCOE_WQE_SGL_MODE_SHIFT         4
 699 #define FCOE_WQE_CONTINUATION_MASK      0x1
 700 #define FCOE_WQE_CONTINUATION_SHIFT     5
 701 #define FCOE_WQE_SEND_AUTO_RSP_MASK     0x1
 702 #define FCOE_WQE_SEND_AUTO_RSP_SHIFT    6
 703 #define FCOE_WQE_RESERVED_MASK          0x1
 704 #define FCOE_WQE_RESERVED_SHIFT         7
 705 #define FCOE_WQE_NUM_SGES_MASK          0xF
 706 #define FCOE_WQE_NUM_SGES_SHIFT         8
 707 #define FCOE_WQE_RESERVED1_MASK         0xF
 708 #define FCOE_WQE_RESERVED1_SHIFT        12
 709         union fcoe_additional_info_union additional_info_union;
 710 };
 711
 712 /* FCoE XFRQ element */
 713 struct xfrqe_prot_flags {
 714         u8 flags;
 715 #define XFRQE_PROT_FLAGS_PROT_INTERVAL_SIZE_LOG_MASK    0xF
 716 #define XFRQE_PROT_FLAGS_PROT_INTERVAL_SIZE_LOG_SHIFT   0
 717 #define XFRQE_PROT_FLAGS_DIF_TO_PEER_MASK               0x1
 718 #define XFRQE_PROT_FLAGS_DIF_TO_PEER_SHIFT              4
 719 #define XFRQE_PROT_FLAGS_HOST_INTERFACE_MASK            0x3
 720 #define XFRQE_PROT_FLAGS_HOST_INTERFACE_SHIFT           5
 721 #define XFRQE_PROT_FLAGS_RESERVED_MASK                  0x1
 722 #define XFRQE_PROT_FLAGS_RESERVED_SHIFT                 7
 723 };
 724
 725 /* FCoE doorbell data */
 726 struct fcoe_db_data {
 727         u8 params;
 728 #define FCOE_DB_DATA_DEST_MASK          0x3
 729 #define FCOE_DB_DATA_DEST_SHIFT         0
 730 #define FCOE_DB_DATA_AGG_CMD_MASK       0x3
 731 #define FCOE_DB_DATA_AGG_CMD_SHIFT      2
 732 #define FCOE_DB_DATA_BYPASS_EN_MASK     0x1
 733 #define FCOE_DB_DATA_BYPASS_EN_SHIFT    4
 734 #define FCOE_DB_DATA_RESERVED_MASK      0x1
 735 #define FCOE_DB_DATA_RESERVED_SHIFT     5
 736 #define FCOE_DB_DATA_AGG_VAL_SEL_MASK   0x3
 737 #define FCOE_DB_DATA_AGG_VAL_SEL_SHIFT  6
 738         u8 agg_flags;
 739         __le16 sq_prod;
 740 };
 741
 742 #endif /* __FCOE_COMMON__ */