1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
4 * Hannu Savolainen 1993-1996,
7 * Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)
9 * Most if code is ported from OSS/Lite.
12 #include <sound/opl3.h>
14 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/slab.h>
18 #include <linux/ioport.h>
19 #include <sound/minors.h>
20 #include "opl3_voice.h"
22 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
23 MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)");
24 MODULE_LICENSE("GPL");
26 static void snd_opl2_command(struct snd_opl3
* opl3
, unsigned short cmd
, unsigned char val
)
32 * The original 2-OP synth requires a quite long delay
33 * after writing to a register.
36 port
= (cmd
& OPL3_RIGHT
) ? opl3
->r_port
: opl3
->l_port
;
38 spin_lock_irqsave(&opl3
->reg_lock
, flags
);
40 outb((unsigned char) cmd
, port
);
43 outb((unsigned char) val
, port
+ 1);
46 spin_unlock_irqrestore(&opl3
->reg_lock
, flags
);
49 static void snd_opl3_command(struct snd_opl3
* opl3
, unsigned short cmd
, unsigned char val
)
55 * The OPL-3 survives with just two INBs
56 * after writing to a register.
59 port
= (cmd
& OPL3_RIGHT
) ? opl3
->r_port
: opl3
->l_port
;
61 spin_lock_irqsave(&opl3
->reg_lock
, flags
);
63 outb((unsigned char) cmd
, port
);
67 outb((unsigned char) val
, port
+ 1);
71 spin_unlock_irqrestore(&opl3
->reg_lock
, flags
);
74 static int snd_opl3_detect(struct snd_opl3
* opl3
)
77 * This function returns 1 if the FM chip is present at the given I/O port
78 * The detection algorithm plays with the timer built in the FM chip and
79 * looks for a change in the status register.
81 * Note! The timers of the FM chip are not connected to AdLib (and compatible)
84 * Note2! The chip is initialized if detected.
87 unsigned char stat1
, stat2
, signature
;
89 /* Reset timers 1 and 2 */
90 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, OPL3_TIMER1_MASK
| OPL3_TIMER2_MASK
);
91 /* Reset the IRQ of the FM chip */
92 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, OPL3_IRQ_RESET
);
93 signature
= stat1
= inb(opl3
->l_port
); /* Status register */
94 if ((stat1
& 0xe0) != 0x00) { /* Should be 0x00 */
95 dev_dbg(opl3
->card
->dev
, "OPL3: stat1 = 0x%x\n", stat1
);
98 /* Set timer1 to 0xff */
99 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER1
, 0xff);
100 /* Unmask and start timer 1 */
101 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, OPL3_TIMER2_MASK
| OPL3_TIMER1_START
);
102 /* Now we have to delay at least 80us */
104 /* Read status after timers have expired */
105 stat2
= inb(opl3
->l_port
);
106 /* Stop the timers */
107 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, OPL3_TIMER1_MASK
| OPL3_TIMER2_MASK
);
108 /* Reset the IRQ of the FM chip */
109 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, OPL3_IRQ_RESET
);
110 if ((stat2
& 0xe0) != 0xc0) { /* There is no YM3812 */
111 dev_dbg(opl3
->card
->dev
, "OPL3: stat2 = 0x%x\n", stat2
);
115 /* If the toplevel code knows exactly the type of chip, don't try
117 if (opl3
->hardware
!= OPL3_HW_AUTO
)
120 /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */
121 if (signature
== 0x06) { /* OPL2 */
122 opl3
->hardware
= OPL3_HW_OPL2
;
125 * If we had an OPL4 chip, opl3->hardware would have been set
126 * by the OPL4 driver; so we can assume OPL3 here.
128 if (snd_BUG_ON(!opl3
->r_port
))
130 opl3
->hardware
= OPL3_HW_OPL3
;
143 static int snd_opl3_timer1_start(struct snd_timer
* timer
)
148 struct snd_opl3
*opl3
;
150 opl3
= snd_timer_chip(timer
);
151 spin_lock_irqsave(&opl3
->timer_lock
, flags
);
152 ticks
= timer
->sticks
;
153 tmp
= (opl3
->timer_enable
| OPL3_TIMER1_START
) & ~OPL3_TIMER1_MASK
;
154 opl3
->timer_enable
= tmp
;
155 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER1
, 256 - ticks
); /* timer 1 count */
156 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, tmp
); /* enable timer 1 IRQ */
157 spin_unlock_irqrestore(&opl3
->timer_lock
, flags
);
161 static int snd_opl3_timer1_stop(struct snd_timer
* timer
)
165 struct snd_opl3
*opl3
;
167 opl3
= snd_timer_chip(timer
);
168 spin_lock_irqsave(&opl3
->timer_lock
, flags
);
169 tmp
= (opl3
->timer_enable
| OPL3_TIMER1_MASK
) & ~OPL3_TIMER1_START
;
170 opl3
->timer_enable
= tmp
;
171 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, tmp
); /* disable timer #1 */
172 spin_unlock_irqrestore(&opl3
->timer_lock
, flags
);
180 static int snd_opl3_timer2_start(struct snd_timer
* timer
)
185 struct snd_opl3
*opl3
;
187 opl3
= snd_timer_chip(timer
);
188 spin_lock_irqsave(&opl3
->timer_lock
, flags
);
189 ticks
= timer
->sticks
;
190 tmp
= (opl3
->timer_enable
| OPL3_TIMER2_START
) & ~OPL3_TIMER2_MASK
;
191 opl3
->timer_enable
= tmp
;
192 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER2
, 256 - ticks
); /* timer 1 count */
193 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, tmp
); /* enable timer 1 IRQ */
194 spin_unlock_irqrestore(&opl3
->timer_lock
, flags
);
198 static int snd_opl3_timer2_stop(struct snd_timer
* timer
)
202 struct snd_opl3
*opl3
;
204 opl3
= snd_timer_chip(timer
);
205 spin_lock_irqsave(&opl3
->timer_lock
, flags
);
206 tmp
= (opl3
->timer_enable
| OPL3_TIMER2_MASK
) & ~OPL3_TIMER2_START
;
207 opl3
->timer_enable
= tmp
;
208 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TIMER_CONTROL
, tmp
); /* disable timer #1 */
209 spin_unlock_irqrestore(&opl3
->timer_lock
, flags
);
217 static const struct snd_timer_hardware snd_opl3_timer1
=
219 .flags
= SNDRV_TIMER_HW_STOP
,
222 .start
= snd_opl3_timer1_start
,
223 .stop
= snd_opl3_timer1_stop
,
226 static const struct snd_timer_hardware snd_opl3_timer2
=
228 .flags
= SNDRV_TIMER_HW_STOP
,
229 .resolution
= 320000,
231 .start
= snd_opl3_timer2_start
,
232 .stop
= snd_opl3_timer2_stop
,
235 static int snd_opl3_timer1_init(struct snd_opl3
* opl3
, int timer_no
)
237 struct snd_timer
*timer
= NULL
;
238 struct snd_timer_id tid
;
241 tid
.dev_class
= SNDRV_TIMER_CLASS_CARD
;
242 tid
.dev_sclass
= SNDRV_TIMER_SCLASS_NONE
;
243 tid
.card
= opl3
->card
->number
;
244 tid
.device
= timer_no
;
246 err
= snd_timer_new(opl3
->card
, "AdLib timer #1", &tid
, &timer
);
248 strcpy(timer
->name
, "AdLib timer #1");
249 timer
->private_data
= opl3
;
250 timer
->hw
= snd_opl3_timer1
;
252 opl3
->timer1
= timer
;
256 static int snd_opl3_timer2_init(struct snd_opl3
* opl3
, int timer_no
)
258 struct snd_timer
*timer
= NULL
;
259 struct snd_timer_id tid
;
262 tid
.dev_class
= SNDRV_TIMER_CLASS_CARD
;
263 tid
.dev_sclass
= SNDRV_TIMER_SCLASS_NONE
;
264 tid
.card
= opl3
->card
->number
;
265 tid
.device
= timer_no
;
267 err
= snd_timer_new(opl3
->card
, "AdLib timer #2", &tid
, &timer
);
269 strcpy(timer
->name
, "AdLib timer #2");
270 timer
->private_data
= opl3
;
271 timer
->hw
= snd_opl3_timer2
;
273 opl3
->timer2
= timer
;
281 void snd_opl3_interrupt(struct snd_hwdep
* hw
)
283 unsigned char status
;
284 struct snd_opl3
*opl3
;
285 struct snd_timer
*timer
;
290 opl3
= hw
->private_data
;
291 status
= inb(opl3
->l_port
);
292 if (!(status
& 0x80))
296 timer
= opl3
->timer1
;
297 snd_timer_interrupt(timer
, timer
->sticks
);
300 timer
= opl3
->timer2
;
301 snd_timer_interrupt(timer
, timer
->sticks
);
305 EXPORT_SYMBOL(snd_opl3_interrupt
);
311 static int snd_opl3_free(struct snd_opl3
*opl3
)
313 if (snd_BUG_ON(!opl3
))
315 if (opl3
->private_free
)
316 opl3
->private_free(opl3
);
317 snd_opl3_clear_patches(opl3
);
318 release_and_free_resource(opl3
->res_l_port
);
319 release_and_free_resource(opl3
->res_r_port
);
324 static int snd_opl3_dev_free(struct snd_device
*device
)
326 struct snd_opl3
*opl3
= device
->device_data
;
327 return snd_opl3_free(opl3
);
330 int snd_opl3_new(struct snd_card
*card
,
331 unsigned short hardware
,
332 struct snd_opl3
**ropl3
)
334 static const struct snd_device_ops ops
= {
335 .dev_free
= snd_opl3_dev_free
,
337 struct snd_opl3
*opl3
;
341 opl3
= kzalloc(sizeof(*opl3
), GFP_KERNEL
);
346 opl3
->hardware
= hardware
;
347 spin_lock_init(&opl3
->reg_lock
);
348 spin_lock_init(&opl3
->timer_lock
);
350 err
= snd_device_new(card
, SNDRV_DEV_CODEC
, opl3
, &ops
);
360 EXPORT_SYMBOL(snd_opl3_new
);
362 int snd_opl3_init(struct snd_opl3
*opl3
)
364 if (! opl3
->command
) {
365 dev_err(opl3
->card
->dev
,
366 "snd_opl3_init: command not defined!\n");
370 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_TEST
, OPL3_ENABLE_WAVE_SELECT
);
372 opl3
->command(opl3
, OPL3_LEFT
| OPL3_REG_PERCUSSION
, 0x00);
374 switch (opl3
->hardware
& OPL3_HW_MASK
) {
376 opl3
->max_voices
= MAX_OPL2_VOICES
;
380 opl3
->max_voices
= MAX_OPL3_VOICES
;
381 /* Enter OPL3 mode */
382 opl3
->command(opl3
, OPL3_RIGHT
| OPL3_REG_MODE
, OPL3_OPL3_ENABLE
);
387 EXPORT_SYMBOL(snd_opl3_init
);
389 int snd_opl3_create(struct snd_card
*card
,
390 unsigned long l_port
,
391 unsigned long r_port
,
392 unsigned short hardware
,
394 struct snd_opl3
** ropl3
)
396 struct snd_opl3
*opl3
;
400 err
= snd_opl3_new(card
, hardware
, &opl3
);
404 opl3
->res_l_port
= request_region(l_port
, 2, "OPL2/3 (left)");
405 if (!opl3
->res_l_port
) {
406 dev_err(card
->dev
, "opl3: can't grab left port 0x%lx\n", l_port
);
407 snd_device_free(card
, opl3
);
411 opl3
->res_r_port
= request_region(r_port
, 2, "OPL2/3 (right)");
412 if (!opl3
->res_r_port
) {
413 dev_err(card
->dev
, "opl3: can't grab right port 0x%lx\n", r_port
);
414 snd_device_free(card
, opl3
);
419 opl3
->l_port
= l_port
;
420 opl3
->r_port
= r_port
;
422 switch (opl3
->hardware
) {
423 /* some hardware doesn't support timers */
424 case OPL3_HW_OPL3_SV
:
425 case OPL3_HW_OPL3_CS
:
426 case OPL3_HW_OPL3_FM801
:
427 opl3
->command
= &snd_opl3_command
;
430 opl3
->command
= &snd_opl2_command
;
431 err
= snd_opl3_detect(opl3
);
433 dev_dbg(card
->dev
, "OPL2/3 chip not detected at 0x%lx/0x%lx\n",
434 opl3
->l_port
, opl3
->r_port
);
435 snd_device_free(card
, opl3
);
438 /* detect routine returns correct hardware type */
439 switch (opl3
->hardware
& OPL3_HW_MASK
) {
442 opl3
->command
= &snd_opl3_command
;
452 EXPORT_SYMBOL(snd_opl3_create
);
454 int snd_opl3_timer_new(struct snd_opl3
* opl3
, int timer1_dev
, int timer2_dev
)
458 if (timer1_dev
>= 0) {
459 err
= snd_opl3_timer1_init(opl3
, timer1_dev
);
463 if (timer2_dev
>= 0) {
464 err
= snd_opl3_timer2_init(opl3
, timer2_dev
);
466 snd_device_free(opl3
->card
, opl3
->timer1
);
474 EXPORT_SYMBOL(snd_opl3_timer_new
);
476 int snd_opl3_hwdep_new(struct snd_opl3
* opl3
,
477 int device
, int seq_device
,
478 struct snd_hwdep
** rhwdep
)
480 struct snd_hwdep
*hw
;
481 struct snd_card
*card
= opl3
->card
;
487 /* create hardware dependent device (direct FM) */
489 err
= snd_hwdep_new(card
, "OPL2/OPL3", device
, &hw
);
491 snd_device_free(card
, opl3
);
494 hw
->private_data
= opl3
;
496 #ifdef CONFIG_SND_OSSEMUL
498 hw
->oss_type
= SNDRV_OSS_DEVICE_TYPE_DMFM
;
500 strcpy(hw
->name
, hw
->id
);
501 switch (opl3
->hardware
& OPL3_HW_MASK
) {
503 strcpy(hw
->name
, "OPL2 FM");
504 hw
->iface
= SNDRV_HWDEP_IFACE_OPL2
;
507 strcpy(hw
->name
, "OPL3 FM");
508 hw
->iface
= SNDRV_HWDEP_IFACE_OPL3
;
511 strcpy(hw
->name
, "OPL4 FM");
512 hw
->iface
= SNDRV_HWDEP_IFACE_OPL4
;
516 /* operators - only ioctl */
517 hw
->ops
.open
= snd_opl3_open
;
518 hw
->ops
.ioctl
= snd_opl3_ioctl
;
519 hw
->ops
.write
= snd_opl3_write
;
520 hw
->ops
.release
= snd_opl3_release
;
523 opl3
->seq_dev_num
= seq_device
;
524 #if IS_ENABLED(CONFIG_SND_SEQUENCER)
525 if (snd_seq_device_new(card
, seq_device
, SNDRV_SEQ_DEV_ID_OPL3
,
526 sizeof(struct snd_opl3
*), &opl3
->seq_dev
) >= 0) {
527 strcpy(opl3
->seq_dev
->name
, hw
->name
);
528 *(struct snd_opl3
**)SNDRV_SEQ_DEVICE_ARGPTR(opl3
->seq_dev
) = opl3
;
536 EXPORT_SYMBOL(snd_opl3_hwdep_new
);