1 /* SPDX-License-Identifier: GPL-2.0 */
3 #ifndef __ASM_CSKY_PGTABLE_BITS_H
4 #define __ASM_CSKY_PGTABLE_BITS_H
6 /* implemented in software */
7 #define _PAGE_ACCESSED (1<<7)
8 #define _PAGE_READ (1<<8)
9 #define _PAGE_WRITE (1<<9)
10 #define _PAGE_PRESENT (1<<10)
11 #define _PAGE_MODIFIED (1<<11)
13 /* We borrow bit 7 to store the exclusive marker in swap PTEs. */
14 #define _PAGE_SWP_EXCLUSIVE (1<<7)
16 /* implemented in hardware */
17 #define _PAGE_GLOBAL (1<<0)
18 #define _PAGE_VALID (1<<1)
19 #define _PAGE_DIRTY (1<<2)
21 #define _PAGE_SO (1<<5)
22 #define _PAGE_BUF (1<<6)
23 #define _PAGE_CACHE (1<<3)
24 #define _CACHE_MASK _PAGE_CACHE
26 #define _CACHE_CACHED (_PAGE_CACHE | _PAGE_BUF)
27 #define _CACHE_UNCACHED (0)
29 #define _PAGE_PROT_NONE _PAGE_WRITE
32 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
33 * are !pte_none() && !pte_present().
36 * bit 0: _PAGE_GLOBAL (zero)
37 * bit 1: _PAGE_VALID (zero)
38 * bit 2 - 6: swap type
39 * bit 7: exclusive marker
40 * bit 8: swap offset[0]
41 * bit 9: _PAGE_WRITE (zero)
42 * bit 10: _PAGE_PRESENT (zero)
43 * bit 11 - 31: swap offset[1 - 21]
45 #define __swp_type(x) (((x).val >> 2) & 0x1f)
46 #define __swp_offset(x) ((((x).val >> 8) & 0x1) | \
47 (((x).val >> 10) & 0x3ffffe))
48 #define __swp_entry(type, offset) ((swp_entry_t) { \
49 ((type & 0x1f) << 2) | \
50 ((offset & 0x1) << 8) | \
51 ((offset & 0x3ffffe) << 10)})
53 #endif /* __ASM_CSKY_PGTABLE_BITS_H */