1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
3 #define _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_
5 #include <asm/cpu-info.h>
7 #ifdef CONFIG_CPU_LOONGSON3_CPUCFG_EMULATION
9 #include <loongson_regs.h>
11 #define LOONGSON_FPREV_MASK 0x7
13 void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips
*c
);
15 static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips
*c
)
17 /* All supported cores have non-zero LOONGSON_CFG1 data. */
18 return c
->loongson3_cpucfg_data
[0] != 0;
21 static inline u32
loongson3_cpucfg_read_synthesized(struct cpuinfo_mips
*c
,
26 return c
->processor_id
;
30 return c
->loongson3_cpucfg_data
[sel
- 1];
33 /* CPUCFG selects 4 and 5 are related to the input clock
36 * Unimplemented for now.
40 /* CPUCFG select 6 is for the undocumented Safe Extension. */
43 /* CPUCFG select 7 is for the virtualization extension.
44 * We don't know if the two currently known features are
45 * supported on older cores according to the public
46 * documentation, so leave this at zero.
52 * Return 0 for unrecognized CPUCFG selects, which is real hardware
53 * behavior observed on Loongson 3A R4.
58 static inline void loongson3_cpucfg_synthesize_data(struct cpuinfo_mips
*c
)
62 static inline bool loongson3_cpucfg_emulation_enabled(struct cpuinfo_mips
*c
)
67 static inline u32
loongson3_cpucfg_read_synthesized(struct cpuinfo_mips
*c
,
74 #endif /* _ASM_MACH_LOONGSON64_CPUCFG_EMUL_H_ */