2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1985 MIPS Computer Systems, Inc.
7 * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
8 * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
9 * Copyright (C) 2011 Wind River Systems,
10 * written by Ralf Baechle <ralf@linux-mips.org>
15 #include <asm/sgidefs.h>
17 #if _MIPS_SIM == _MIPS_SIM_ABI32
20 * General purpose register numbers for 32 bit ABI
22 #define GPR_ZERO 0 /* wired zero */
23 #define GPR_AT 1 /* assembler temp */
24 #define GPR_V0 2 /* return value */
26 #define GPR_A0 4 /* argument registers */
30 #define GPR_T0 8 /* caller saved */
42 #define GPR_S0 16 /* callee saved */
50 #define GPR_T8 24 /* caller saved */
52 #define GPR_JP 25 /* PIC jump register */
53 #define GPR_K0 26 /* kernel scratch */
55 #define GPR_GP 28 /* global pointer */
56 #define GPR_SP 29 /* stack pointer */
57 #define GPR_FP 30 /* frame pointer */
58 #define GPR_S8 30 /* same like fp! */
59 #define GPR_RA 31 /* return address */
61 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
63 #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
65 #define GPR_ZERO 0 /* wired zero */
66 #define GPR_AT 1 /* assembler temp */
67 #define GPR_V0 2 /* return value - caller saved */
69 #define GPR_A0 4 /* argument registers */
73 #define GPR_A4 8 /* arg reg 64 bit; caller saved in 32 bit */
81 #define GPR_T0 12 /* caller saved */
85 #define GPR_S0 16 /* callee saved */
93 #define GPR_T8 24 /* caller saved */
94 #define GPR_T9 25 /* callee address for PIC/temp */
95 #define GPR_JP 25 /* PIC jump register */
96 #define GPR_K0 26 /* kernel temporary */
98 #define GPR_GP 28 /* global pointer - caller saved for PIC */
99 #define GPR_SP 29 /* stack pointer */
100 #define GPR_FP 30 /* frame pointer */
101 #define GPR_S8 30 /* callee saved */
102 #define GPR_RA 31 /* return address */
104 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
107 #if _MIPS_SIM == _MIPS_SIM_ABI32
110 * Symbolic register names for 32 bit ABI
112 #define zero $0 /* wired zero */
113 #define AT $1 /* assembler temp - uppercase because of ".set at" */
114 #define v0 $2 /* return value */
116 #define a0 $4 /* argument registers */
120 #define t0 $8 /* caller saved */
132 #define s0 $16 /* callee saved */
140 #define t8 $24 /* caller saved */
142 #define jp $25 /* PIC jump register */
143 #define k0 $26 /* kernel scratch */
145 #define gp $28 /* global pointer */
146 #define sp $29 /* stack pointer */
147 #define fp $30 /* frame pointer */
148 #define s8 $30 /* same like fp! */
149 #define ra $31 /* return address */
151 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
153 #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
155 #define zero $0 /* wired zero */
156 #define AT $at /* assembler temp - uppercase because of ".set at" */
157 #define v0 $2 /* return value - caller saved */
159 #define a0 $4 /* argument registers */
163 #define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */
171 #define t0 $12 /* caller saved */
175 #define s0 $16 /* callee saved */
183 #define t8 $24 /* caller saved */
184 #define t9 $25 /* callee address for PIC/temp */
185 #define jp $25 /* PIC jump register */
186 #define k0 $26 /* kernel temporary */
188 #define gp $28 /* global pointer - caller saved for PIC */
189 #define sp $29 /* stack pointer */
190 #define fp $30 /* frame pointer */
191 #define s8 $30 /* callee saved */
192 #define ra $31 /* return address */
194 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
195 #endif /* __ASSEMBLY__ */
197 #endif /* _ASM_REGDEF_H */