arch/mips/include/asm/txx9tmr.h

   1 /*
   2  * include/asm-mips/txx9tmr.h
   3  * TX39/TX49 timer controller definitions.
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file "COPYING" in the main directory of this archive
   7  * for more details.
   8  */
   9 #ifndef __ASM_TXX9TMR_H
  10 #define __ASM_TXX9TMR_H
  11
  12 #include <linux/types.h>
  13
  14 struct txx9_tmr_reg {
  15         u32 tcr;
  16         u32 tisr;
  17         u32 cpra;
  18         u32 cprb;
  19         u32 itmr;
  20         u32 unused0[3];
  21         u32 ccdr;
  22         u32 unused1[3];
  23         u32 pgmr;
  24         u32 unused2[3];
  25         u32 wtmr;
  26         u32 unused3[43];
  27         u32 trr;
  28 };
  29
  30 /* TMTCR : Timer Control */
  31 #define TXx9_TMTCR_TCE          0x00000080
  32 #define TXx9_TMTCR_CCDE         0x00000040
  33 #define TXx9_TMTCR_CRE          0x00000020
  34 #define TXx9_TMTCR_ECES         0x00000008
  35 #define TXx9_TMTCR_CCS          0x00000004
  36 #define TXx9_TMTCR_TMODE_MASK   0x00000003
  37 #define TXx9_TMTCR_TMODE_ITVL   0x00000000
  38 #define TXx9_TMTCR_TMODE_PGEN   0x00000001
  39 #define TXx9_TMTCR_TMODE_WDOG   0x00000002
  40
  41 /* TMTISR : Timer Int. Status */
  42 #define TXx9_TMTISR_TPIBS       0x00000004
  43 #define TXx9_TMTISR_TPIAS       0x00000002
  44 #define TXx9_TMTISR_TIIS        0x00000001
  45
  46 /* TMITMR : Interval Timer Mode */
  47 #define TXx9_TMITMR_TIIE        0x00008000
  48 #define TXx9_TMITMR_TZCE        0x00000001
  49
  50 /* TMWTMR : Watchdog Timer Mode */
  51 #define TXx9_TMWTMR_TWIE        0x00008000
  52 #define TXx9_TMWTMR_WDIS        0x00000080
  53 #define TXx9_TMWTMR_TWC         0x00000001
  54
  55 void txx9_clocksource_init(unsigned long baseaddr,
  56                            unsigned int imbusclk);
  57 void txx9_clockevent_init(unsigned long baseaddr, int irq,
  58                           unsigned int imbusclk);
  59 void txx9_tmr_init(unsigned long baseaddr);
  60
  61 #define TXX9_TIMER_BITS 32
  62
  63 #endif /* __ASM_TXX9TMR_H */