arch/riscv/include/asm/kvm_vcpu_timer.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2019 Western Digital Corporation or its affiliates.
   4  *
   5  * Authors:
   6  *      Atish Patra <atish.patra@wdc.com>
   7  */
   8
   9 #ifndef __KVM_VCPU_RISCV_TIMER_H
  10 #define __KVM_VCPU_RISCV_TIMER_H
  11
  12 #include <linux/hrtimer.h>
  13
  14 struct kvm_guest_timer {
  15         /* Mult & Shift values to get nanoseconds from cycles */
  16         u32 nsec_mult;
  17         u32 nsec_shift;
  18         /* Time delta value */
  19         u64 time_delta;
  20 };
  21
  22 struct kvm_vcpu_timer {
  23         /* Flag for whether init is done */
  24         bool init_done;
  25         /* Flag for whether timer event is configured */
  26         bool next_set;
  27         /* Next timer event cycles */
  28         u64 next_cycles;
  29         /* Underlying hrtimer instance */
  30         struct hrtimer hrt;
  31
  32         /* Flag to check if sstc is enabled or not */
  33         bool sstc_enabled;
  34         /* A function pointer to switch between stimecmp or hrtimer at runtime */
  35         int (*timer_next_event)(struct kvm_vcpu *vcpu, u64 ncycles);
  36 };
  37
  38 int kvm_riscv_vcpu_timer_next_event(struct kvm_vcpu *vcpu, u64 ncycles);
  39 int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu,
  40                                  const struct kvm_one_reg *reg);
  41 int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu,
  42                                  const struct kvm_one_reg *reg);
  43 int kvm_riscv_vcpu_timer_init(struct kvm_vcpu *vcpu);
  44 int kvm_riscv_vcpu_timer_deinit(struct kvm_vcpu *vcpu);
  45 int kvm_riscv_vcpu_timer_reset(struct kvm_vcpu *vcpu);
  46 void kvm_riscv_vcpu_timer_restore(struct kvm_vcpu *vcpu);
  47 void kvm_riscv_guest_timer_init(struct kvm *kvm);
  48 void kvm_riscv_vcpu_timer_sync(struct kvm_vcpu *vcpu);
  49 void kvm_riscv_vcpu_timer_save(struct kvm_vcpu *vcpu);
  50 bool kvm_riscv_vcpu_timer_pending(struct kvm_vcpu *vcpu);
  51
  52 #endif