arch/riscv/include/asm/switch_to.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2012 Regents of the University of California
   4  */
   5
   6 #ifndef _ASM_RISCV_SWITCH_TO_H
   7 #define _ASM_RISCV_SWITCH_TO_H
   8
   9 #include <linux/jump_label.h>
  10 #include <linux/sched/task_stack.h>
  11 #include <linux/mm_types.h>
  12 #include <asm/vector.h>
  13 #include <asm/cpufeature.h>
  14 #include <asm/processor.h>
  15 #include <asm/ptrace.h>
  16 #include <asm/csr.h>
  17
  18 #ifdef CONFIG_FPU
  19 extern void __fstate_save(struct task_struct *save_to);
  20 extern void __fstate_restore(struct task_struct *restore_from);
  21
  22 static inline void __fstate_clean(struct pt_regs *regs)
  23 {
  24         regs->status = (regs->status & ~SR_FS) | SR_FS_CLEAN;
  25 }
  26
  27 static inline void fstate_off(struct task_struct *task,
  28                               struct pt_regs *regs)
  29 {
  30         regs->status = (regs->status & ~SR_FS) | SR_FS_OFF;
  31 }
  32
  33 static inline void fstate_save(struct task_struct *task,
  34                                struct pt_regs *regs)
  35 {
  36         if ((regs->status & SR_FS) == SR_FS_DIRTY) {
  37                 __fstate_save(task);
  38                 __fstate_clean(regs);
  39         }
  40 }
  41
  42 static inline void fstate_restore(struct task_struct *task,
  43                                   struct pt_regs *regs)
  44 {
  45         if ((regs->status & SR_FS) != SR_FS_OFF) {
  46                 __fstate_restore(task);
  47                 __fstate_clean(regs);
  48         }
  49 }
  50
  51 static inline void __switch_to_fpu(struct task_struct *prev,
  52                                    struct task_struct *next)
  53 {
  54         struct pt_regs *regs;
  55
  56         regs = task_pt_regs(prev);
  57         fstate_save(prev, regs);
  58         fstate_restore(next, task_pt_regs(next));
  59 }
  60
  61 static __always_inline bool has_fpu(void)
  62 {
  63         return riscv_has_extension_likely(RISCV_ISA_EXT_f) ||
  64                 riscv_has_extension_likely(RISCV_ISA_EXT_d);
  65 }
  66 #else
  67 static __always_inline bool has_fpu(void) { return false; }
  68 #define fstate_save(task, regs) do { } while (0)
  69 #define fstate_restore(task, regs) do { } while (0)
  70 #define __switch_to_fpu(__prev, __next) do { } while (0)
  71 #endif
  72
  73 extern struct task_struct *__switch_to(struct task_struct *,
  74                                        struct task_struct *);
  75
  76 static inline bool switch_to_should_flush_icache(struct task_struct *task)
  77 {
  78 #ifdef CONFIG_SMP
  79         bool stale_mm = task->mm && task->mm->context.force_icache_flush;
  80         bool stale_thread = task->thread.force_icache_flush;
  81         bool thread_migrated = smp_processor_id() != task->thread.prev_cpu;
  82
  83         return thread_migrated && (stale_mm || stale_thread);
  84 #else
  85         return false;
  86 #endif
  87 }
  88
  89 #ifdef CONFIG_SMP
  90 #define __set_prev_cpu(thread) ((thread).prev_cpu = smp_processor_id())
  91 #else
  92 #define __set_prev_cpu(thread)
  93 #endif
  94
  95 #define switch_to(prev, next, last)                     \
  96 do {                                                    \
  97         struct task_struct *__prev = (prev);            \
  98         struct task_struct *__next = (next);            \
  99         __set_prev_cpu(__prev->thread);                 \
 100         if (has_fpu())                                  \
 101                 __switch_to_fpu(__prev, __next);        \
 102         if (has_vector())                                       \
 103                 __switch_to_vector(__prev, __next);     \
 104         if (switch_to_should_flush_icache(__next))      \
 105                 local_flush_icache_all();               \
 106         ((last) = __switch_to(__prev, __next));         \
 107 } while (0)
 108
 109 #endif /* _ASM_RISCV_SWITCH_TO_H */