arch/riscv/include/asm/vdso/processor.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 #ifndef __ASM_VDSO_PROCESSOR_H
   3 #define __ASM_VDSO_PROCESSOR_H
   4
   5 #ifndef __ASSEMBLY__
   6
   7 #include <asm/barrier.h>
   8 #include <asm/insn-def.h>
   9
  10 static inline void cpu_relax(void)
  11 {
  12 #ifdef __riscv_muldiv
  13         int dummy;
  14         /* In lieu of a halt instruction, induce a long-latency stall. */
  15         __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
  16 #endif
  17
  18         /*
  19          * Reduce instruction retirement.
  20          * This assumes the PC changes.
  21          */
  22         __asm__ __volatile__ (RISCV_PAUSE);
  23         barrier();
  24 }
  25
  26 #endif /* __ASSEMBLY__ */
  27
  28 #endif /* __ASM_VDSO_PROCESSOR_H */