drm/panthor: Don't add write fences to the shared BOs
[drm/drm-misc.git] / drivers / pmdomain / renesas / r8a77960-sysc.c
blob2ab3f565d2b0f8893283230c8807c49d4f2576bb
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Renesas R-Car M3-W System Controller
5 * Copyright (C) 2016 Glider bvba
6 * Copyright (C) 2018-2019 Renesas Electronics Corporation
7 */
9 #include <linux/bits.h>
10 #include <linux/kernel.h>
12 #include <dt-bindings/power/r8a7796-sysc.h>
14 #include "rcar-sysc.h"
16 static const struct rcar_sysc_area r8a77960_areas[] __initconst = {
17 { "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
18 { "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
19 PD_SCU },
20 { "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
21 PD_CPU_NOCR },
22 { "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
23 PD_CPU_NOCR },
24 { "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON,
25 PD_SCU },
26 { "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
27 PD_CPU_NOCR },
28 { "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
29 PD_CPU_NOCR },
30 { "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
31 PD_CPU_NOCR },
32 { "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
33 PD_CPU_NOCR },
34 { "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON },
35 { "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON,
36 PD_OFF_DELAY },
37 { "a2vc0", 0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC },
38 { "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
39 { "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
40 { "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
41 { "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON,
42 PD_OFF_DELAY },
46 const struct rcar_sysc_info r8a77960_sysc_info __initconst = {
47 .areas = r8a77960_areas,
48 .num_areas = ARRAY_SIZE(r8a77960_areas),