drm/panthor: Don't add write fences to the shared BOs
[drm/drm-misc.git] / drivers / power / reset / as3722-poweroff.c
blobbb26fa6fa67ca720e131bae4a5a7f178fc5c6d9c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Power off driver for ams AS3722 device.
5 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 * Author: Laxman Dewangan <ldewangan@nvidia.com>
8 */
10 #include <linux/mfd/as3722.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/platform_device.h>
14 #include <linux/reboot.h>
15 #include <linux/slab.h>
17 struct as3722_poweroff {
18 struct device *dev;
19 struct as3722 *as3722;
22 static int as3722_pm_power_off(struct sys_off_data *data)
24 struct as3722_poweroff *as3722_pm_poweroff = data->cb_data;
25 int ret;
27 ret = as3722_update_bits(as3722_pm_poweroff->as3722,
28 AS3722_RESET_CONTROL_REG, AS3722_POWER_OFF, AS3722_POWER_OFF);
29 if (ret < 0)
30 dev_err(as3722_pm_poweroff->dev,
31 "RESET_CONTROL_REG update failed, %d\n", ret);
33 return NOTIFY_DONE;
36 static int as3722_poweroff_probe(struct platform_device *pdev)
38 struct as3722_poweroff *as3722_poweroff;
39 struct device_node *np = pdev->dev.parent->of_node;
41 if (!np)
42 return -EINVAL;
44 if (!of_property_read_bool(np, "ams,system-power-controller"))
45 return 0;
47 as3722_poweroff = devm_kzalloc(&pdev->dev, sizeof(*as3722_poweroff),
48 GFP_KERNEL);
49 if (!as3722_poweroff)
50 return -ENOMEM;
52 as3722_poweroff->as3722 = dev_get_drvdata(pdev->dev.parent);
53 as3722_poweroff->dev = &pdev->dev;
55 return devm_register_sys_off_handler(as3722_poweroff->dev,
56 SYS_OFF_MODE_POWER_OFF,
57 SYS_OFF_PRIO_DEFAULT,
58 as3722_pm_power_off,
59 as3722_poweroff);
61 return 0;
64 static struct platform_driver as3722_poweroff_driver = {
65 .driver = {
66 .name = "as3722-power-off",
68 .probe = as3722_poweroff_probe,
71 module_platform_driver(as3722_poweroff_driver);
73 MODULE_DESCRIPTION("Power off driver for ams AS3722 PMIC Device");
74 MODULE_ALIAS("platform:as3722-power-off");
75 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");