1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence USBSS PCI Glue driver
5 * Copyright (C) 2018-2019 Cadence.
7 * Author: Pawel Laszczak <pawell@cadence.com>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/slab.h>
18 struct platform_device
*plat_dev
;
19 struct resource dev_res
[6];
23 #define RES_IRQ_HOST_ID 0
24 #define RES_IRQ_PERIPHERAL_ID 1
25 #define RES_IRQ_OTG_ID 2
30 #define PCI_BAR_HOST 0
34 #define PCI_DEV_FN_HOST_DEVICE 0
35 #define PCI_DEV_FN_OTG 1
37 #define PCI_DRIVER_NAME "cdns3-pci-usbss"
38 #define PLAT_DRIVER_NAME "cdns-usb3"
40 #define PCI_DEVICE_ID_CDNS_USB3 0x0100
42 static struct pci_dev
*cdns3_get_second_fun(struct pci_dev
*pdev
)
47 * Gets the second function.
48 * It's little tricky, but this platform has two function.
49 * The fist keeps resources for Host/Device while the second
50 * keeps resources for DRD/OTG.
52 func
= pci_get_device(pdev
->vendor
, pdev
->device
, NULL
);
56 if (func
->devfn
== pdev
->devfn
) {
57 func
= pci_get_device(pdev
->vendor
, pdev
->device
, func
);
62 if (func
->devfn
!= PCI_DEV_FN_HOST_DEVICE
&&
63 func
->devfn
!= PCI_DEV_FN_OTG
) {
70 static int cdns3_pci_probe(struct pci_dev
*pdev
,
71 const struct pci_device_id
*id
)
73 struct platform_device_info plat_info
;
74 struct cdns3_wrap
*wrap
;
80 * for GADGET/HOST PCI (devfn) function number is 0,
81 * for OTG PCI (devfn) function number is 1
83 if (!id
|| (pdev
->devfn
!= PCI_DEV_FN_HOST_DEVICE
&&
84 pdev
->devfn
!= PCI_DEV_FN_OTG
))
87 func
= cdns3_get_second_fun(pdev
);
91 err
= pcim_enable_device(pdev
);
93 dev_err(&pdev
->dev
, "Enabling PCI device has failed %d\n", err
);
99 if (pci_is_enabled(func
)) {
100 wrap
= pci_get_drvdata(func
);
102 wrap
= kzalloc(sizeof(*wrap
), GFP_KERNEL
);
104 pci_disable_device(pdev
);
111 if (pdev
->devfn
== PCI_DEV_FN_HOST_DEVICE
) {
112 /* function 0: host(BAR_0) + device(BAR_1).*/
113 dev_dbg(&pdev
->dev
, "Initialize Device resources\n");
114 res
[RES_DEV_ID
].start
= pci_resource_start(pdev
, PCI_BAR_DEV
);
115 res
[RES_DEV_ID
].end
= pci_resource_end(pdev
, PCI_BAR_DEV
);
116 res
[RES_DEV_ID
].name
= "dev";
117 res
[RES_DEV_ID
].flags
= IORESOURCE_MEM
;
118 dev_dbg(&pdev
->dev
, "USBSS-DEV physical base addr: %pa\n",
119 &res
[RES_DEV_ID
].start
);
121 res
[RES_HOST_ID
].start
= pci_resource_start(pdev
, PCI_BAR_HOST
);
122 res
[RES_HOST_ID
].end
= pci_resource_end(pdev
, PCI_BAR_HOST
);
123 res
[RES_HOST_ID
].name
= "xhci";
124 res
[RES_HOST_ID
].flags
= IORESOURCE_MEM
;
125 dev_dbg(&pdev
->dev
, "USBSS-XHCI physical base addr: %pa\n",
126 &res
[RES_HOST_ID
].start
);
128 /* Interrupt for XHCI */
129 wrap
->dev_res
[RES_IRQ_HOST_ID
].start
= pdev
->irq
;
130 wrap
->dev_res
[RES_IRQ_HOST_ID
].name
= "host";
131 wrap
->dev_res
[RES_IRQ_HOST_ID
].flags
= IORESOURCE_IRQ
;
133 /* Interrupt device. It's the same as for HOST. */
134 wrap
->dev_res
[RES_IRQ_PERIPHERAL_ID
].start
= pdev
->irq
;
135 wrap
->dev_res
[RES_IRQ_PERIPHERAL_ID
].name
= "peripheral";
136 wrap
->dev_res
[RES_IRQ_PERIPHERAL_ID
].flags
= IORESOURCE_IRQ
;
138 res
[RES_DRD_ID
].start
= pci_resource_start(pdev
, PCI_BAR_OTG
);
139 res
[RES_DRD_ID
].end
= pci_resource_end(pdev
, PCI_BAR_OTG
);
140 res
[RES_DRD_ID
].name
= "otg";
141 res
[RES_DRD_ID
].flags
= IORESOURCE_MEM
;
142 dev_dbg(&pdev
->dev
, "USBSS-DRD physical base addr: %pa\n",
143 &res
[RES_DRD_ID
].start
);
145 /* Interrupt for OTG/DRD. */
146 wrap
->dev_res
[RES_IRQ_OTG_ID
].start
= pdev
->irq
;
147 wrap
->dev_res
[RES_IRQ_OTG_ID
].name
= "otg";
148 wrap
->dev_res
[RES_IRQ_OTG_ID
].flags
= IORESOURCE_IRQ
;
151 if (pci_is_enabled(func
)) {
152 /* set up platform device info */
153 memset(&plat_info
, 0, sizeof(plat_info
));
154 plat_info
.parent
= &pdev
->dev
;
155 plat_info
.fwnode
= pdev
->dev
.fwnode
;
156 plat_info
.name
= PLAT_DRIVER_NAME
;
157 plat_info
.id
= pdev
->devfn
;
158 wrap
->devfn
= pdev
->devfn
;
159 plat_info
.res
= wrap
->dev_res
;
160 plat_info
.num_res
= ARRAY_SIZE(wrap
->dev_res
);
161 plat_info
.dma_mask
= pdev
->dma_mask
;
162 /* register platform device */
163 wrap
->plat_dev
= platform_device_register_full(&plat_info
);
164 if (IS_ERR(wrap
->plat_dev
)) {
165 pci_disable_device(pdev
);
166 err
= PTR_ERR(wrap
->plat_dev
);
172 pci_set_drvdata(pdev
, wrap
);
176 static void cdns3_pci_remove(struct pci_dev
*pdev
)
178 struct cdns3_wrap
*wrap
;
179 struct pci_dev
*func
;
181 func
= cdns3_get_second_fun(pdev
);
183 wrap
= (struct cdns3_wrap
*)pci_get_drvdata(pdev
);
184 if (wrap
->devfn
== pdev
->devfn
)
185 platform_device_unregister(wrap
->plat_dev
);
187 if (!pci_is_enabled(func
))
191 static const struct pci_device_id cdns3_pci_ids
[] = {
192 { PCI_VDEVICE(CDNS
, PCI_DEVICE_ID_CDNS_USB3
) },
196 static struct pci_driver cdns3_pci_driver
= {
197 .name
= PCI_DRIVER_NAME
,
198 .id_table
= cdns3_pci_ids
,
199 .probe
= cdns3_pci_probe
,
200 .remove
= cdns3_pci_remove
,
203 module_pci_driver(cdns3_pci_driver
);
204 MODULE_DEVICE_TABLE(pci
, cdns3_pci_ids
);
206 MODULE_AUTHOR("Pawel Laszczak <pawell@cadence.com>");
207 MODULE_LICENSE("GPL v2");
208 MODULE_DESCRIPTION("Cadence USBSS PCI wrapper");