sound/soc/sprd/sprd-pcm-compress.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (C) 2019 Spreadtrum Communications Inc.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/dmaengine.h>
   6 #include <linux/dma/sprd-dma.h>
   7 #include <linux/kernel.h>
   8 #include <linux/module.h>
   9 #include <sound/pcm.h>
  10 #include <sound/pcm_params.h>
  11 #include <sound/soc.h>
  12 #include <sound/compress_driver.h>
  13
  14 #include "sprd-pcm-dma.h"
  15
  16 #define SPRD_COMPR_DMA_CHANS            2
  17
  18 /* Default values if userspace does not set */
  19 #define SPRD_COMPR_MIN_FRAGMENT_SIZE    SZ_8K
  20 #define SPRD_COMPR_MAX_FRAGMENT_SIZE    SZ_128K
  21 #define SPRD_COMPR_MIN_NUM_FRAGMENTS    4
  22 #define SPRD_COMPR_MAX_NUM_FRAGMENTS    64
  23
  24 /* DSP FIFO size */
  25 #define SPRD_COMPR_MCDT_EMPTY_WMK       0
  26 #define SPRD_COMPR_MCDT_FIFO_SIZE       512
  27
  28 /* Stage 0 IRAM buffer size definition */
  29 #define SPRD_COMPR_IRAM_BUF_SIZE        SZ_32K
  30 #define SPRD_COMPR_IRAM_INFO_SIZE       (sizeof(struct sprd_compr_playinfo))
  31 #define SPRD_COMPR_IRAM_LINKLIST_SIZE   (1024 - SPRD_COMPR_IRAM_INFO_SIZE)
  32 #define SPRD_COMPR_IRAM_SIZE            (SPRD_COMPR_IRAM_BUF_SIZE + \
  33                                          SPRD_COMPR_IRAM_INFO_SIZE + \
  34                                          SPRD_COMPR_IRAM_LINKLIST_SIZE)
  35
  36 /* Stage 1 DDR buffer size definition */
  37 #define SPRD_COMPR_AREA_BUF_SIZE        SZ_2M
  38 #define SPRD_COMPR_AREA_LINKLIST_SIZE   1024
  39 #define SPRD_COMPR_AREA_SIZE            (SPRD_COMPR_AREA_BUF_SIZE + \
  40                                          SPRD_COMPR_AREA_LINKLIST_SIZE)
  41
  42 struct sprd_compr_dma {
  43         struct dma_chan *chan;
  44         struct dma_async_tx_descriptor *desc;
  45         dma_cookie_t cookie;
  46         dma_addr_t phys;
  47         void *virt;
  48         int trans_len;
  49 };
  50
  51 /*
  52  * The Spreadtrum Audio compress offload mode will use 2-stage DMA transfer to
  53  * save power. That means we can request 2 dma channels, one for source channel,
  54  * and another one for destination channel. Once the source channel's transaction
  55  * is done, it will trigger the destination channel's transaction automatically
  56  * by hardware signal.
  57  *
  58  * For 2-stage DMA transfer, we can allocate 2 buffers: IRAM buffer (always
  59  * power-on) and DDR buffer. The source channel will transfer data from IRAM
  60  * buffer to the DSP fifo to decoding/encoding, once IRAM buffer is empty by
  61  * transferring done, the destination channel will start to transfer data from
  62  * DDR buffer to IRAM buffer.
  63  *
  64  * Since the DSP fifo is only 512B, IRAM buffer is allocated by 32K, and DDR
  65  * buffer is larger to 2M. That means only the IRAM 32k data is transferred
  66  * done, we can wake up the AP system to transfer data from DDR to IRAM, and
  67  * other time the AP system can be suspended to save power.
  68  */
  69 struct sprd_compr_stream {
  70         struct snd_compr_stream *cstream;
  71         struct sprd_compr_ops *compr_ops;
  72         struct sprd_compr_dma dma[SPRD_COMPR_DMA_CHANS];
  73
  74         /* DMA engine channel number */
  75         int num_channels;
  76
  77         /* Stage 0 IRAM buffer */
  78         struct snd_dma_buffer iram_buffer;
  79         /* Stage 1 DDR buffer */
  80         struct snd_dma_buffer compr_buffer;
  81
  82         /* DSP play information IRAM buffer */
  83         dma_addr_t info_phys;
  84         void *info_area;
  85         int info_size;
  86
  87         /* Data size copied to IRAM buffer */
  88         int copied_total;
  89         /* Total received data size from userspace */
  90         int received_total;
  91         /* Stage 0 IRAM buffer received data size */
  92         int received_stage0;
  93         /* Stage 1 DDR buffer received data size */
  94         int received_stage1;
  95         /* Stage 1 DDR buffer pointer */
  96         int stage1_pointer;
  97 };
  98
  99 static int sprd_platform_compr_trigger(struct snd_soc_component *component,
 100                                        struct snd_compr_stream *cstream,
 101                                        int cmd);
 102
 103 static void sprd_platform_compr_drain_notify(void *arg)
 104 {
 105         struct snd_compr_stream *cstream = arg;
 106         struct snd_compr_runtime *runtime = cstream->runtime;
 107         struct sprd_compr_stream *stream = runtime->private_data;
 108
 109         memset(stream->info_area, 0, sizeof(struct sprd_compr_playinfo));
 110
 111         snd_compr_drain_notify(cstream);
 112 }
 113
 114 static void sprd_platform_compr_dma_complete(void *data)
 115 {
 116         struct snd_compr_stream *cstream = data;
 117         struct snd_compr_runtime *runtime = cstream->runtime;
 118         struct sprd_compr_stream *stream = runtime->private_data;
 119         struct sprd_compr_dma *dma = &stream->dma[1];
 120
 121         /* Update data size copied to IRAM buffer */
 122         stream->copied_total += dma->trans_len;
 123         if (stream->copied_total > stream->received_total)
 124                 stream->copied_total = stream->received_total;
 125
 126         snd_compr_fragment_elapsed(cstream);
 127 }
 128
 129 static int sprd_platform_compr_dma_config(struct snd_soc_component *component,
 130                                           struct snd_compr_stream *cstream,
 131                                           struct snd_compr_params *params,
 132                                           int channel)
 133 {
 134         struct snd_compr_runtime *runtime = cstream->runtime;
 135         struct sprd_compr_stream *stream = runtime->private_data;
 136         struct snd_soc_pcm_runtime *rtd = cstream->private_data;
 137         struct device *dev = component->dev;
 138         struct sprd_compr_data *data = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
 139         struct sprd_pcm_dma_params *dma_params = data->dma_params;
 140         struct sprd_compr_dma *dma = &stream->dma[channel];
 141         struct dma_slave_config config = { };
 142         struct sprd_dma_linklist link = { };
 143         enum dma_transfer_direction dir;
 144         struct scatterlist *sg, *sgt;
 145         enum dma_slave_buswidth bus_width;
 146         int period, period_cnt, sg_num = 2;
 147         dma_addr_t src_addr, dst_addr;
 148         unsigned long flags;
 149         int ret, j;
 150
 151         if (!dma_params) {
 152                 dev_err(dev, "no dma parameters setting\n");
 153                 return -EINVAL;
 154         }
 155
 156         dma->chan = dma_request_slave_channel(dev,
 157                                               dma_params->chan_name[channel]);
 158         if (!dma->chan) {
 159                 dev_err(dev, "failed to request dma channel\n");
 160                 return -ENODEV;
 161         }
 162
 163         sgt = sg = kcalloc(sg_num, sizeof(*sg), GFP_KERNEL);
 164         if (!sg) {
 165                 ret = -ENOMEM;
 166                 goto sg_err;
 167         }
 168
 169         switch (channel) {
 170         case 0:
 171                 bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 172                 period = (SPRD_COMPR_MCDT_FIFO_SIZE - SPRD_COMPR_MCDT_EMPTY_WMK) * 4;
 173                 period_cnt = params->buffer.fragment_size / period;
 174                 src_addr = stream->iram_buffer.addr;
 175                 dst_addr = dma_params->dev_phys[channel];
 176                 flags = SPRD_DMA_FLAGS(SPRD_DMA_SRC_CHN1,
 177                                        SPRD_DMA_TRANS_DONE_TRG,
 178                                        SPRD_DMA_FRAG_REQ,
 179                                        SPRD_DMA_TRANS_INT);
 180                 break;
 181
 182         case 1:
 183                 bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 184                 period = params->buffer.fragment_size;
 185                 period_cnt = params->buffer.fragments;
 186                 src_addr = stream->compr_buffer.addr;
 187                 dst_addr = stream->iram_buffer.addr;
 188                 flags = SPRD_DMA_FLAGS(SPRD_DMA_DST_CHN1,
 189                                        SPRD_DMA_TRANS_DONE_TRG,
 190                                        SPRD_DMA_FRAG_REQ,
 191                                        SPRD_DMA_TRANS_INT);
 192                 break;
 193
 194         default:
 195                 ret = -EINVAL;
 196                 goto config_err;
 197         }
 198
 199         dma->trans_len = period * period_cnt;
 200
 201         config.src_maxburst = period;
 202         config.src_addr_width = bus_width;
 203         config.dst_addr_width = bus_width;
 204         if (cstream->direction == SND_COMPRESS_PLAYBACK) {
 205                 config.src_addr = src_addr;
 206                 config.dst_addr = dst_addr;
 207                 dir = DMA_MEM_TO_DEV;
 208         } else {
 209                 config.src_addr = dst_addr;
 210                 config.dst_addr = src_addr;
 211                 dir = DMA_DEV_TO_MEM;
 212         }
 213
 214         sg_init_table(sgt, sg_num);
 215         for (j = 0; j < sg_num; j++, sgt++) {
 216                 sg_dma_len(sgt) = dma->trans_len;
 217                 sg_dma_address(sgt) = dst_addr;
 218         }
 219
 220         /*
 221          * Configure the link-list address for the DMA engine link-list
 222          * mode.
 223          */
 224         link.virt_addr = (unsigned long)dma->virt;
 225         link.phy_addr = dma->phys;
 226
 227         ret = dmaengine_slave_config(dma->chan, &config);
 228         if (ret) {
 229                 dev_err(dev,
 230                         "failed to set slave configuration: %d\n", ret);
 231                 goto config_err;
 232         }
 233
 234         /*
 235          * We configure the DMA request mode, interrupt mode, channel
 236          * mode and channel trigger mode by the flags.
 237          */
 238         dma->desc = dma->chan->device->device_prep_slave_sg(dma->chan, sg,
 239                                                             sg_num, dir,
 240                                                             flags, &link);
 241         if (!dma->desc) {
 242                 dev_err(dev, "failed to prepare slave sg\n");
 243                 ret = -ENOMEM;
 244                 goto config_err;
 245         }
 246
 247         /* Only channel 1 transfer can wake up the AP system. */
 248         if (!params->no_wake_mode && channel == 1) {
 249                 dma->desc->callback = sprd_platform_compr_dma_complete;
 250                 dma->desc->callback_param = cstream;
 251         }
 252
 253         kfree(sg);
 254
 255         return 0;
 256
 257 config_err:
 258         kfree(sg);
 259 sg_err:
 260         dma_release_channel(dma->chan);
 261         return ret;
 262 }
 263
 264 static int sprd_platform_compr_set_params(struct snd_soc_component *component,
 265                                           struct snd_compr_stream *cstream,
 266                                           struct snd_compr_params *params)
 267 {
 268         struct snd_compr_runtime *runtime = cstream->runtime;
 269         struct sprd_compr_stream *stream = runtime->private_data;
 270         struct device *dev = component->dev;
 271         struct sprd_compr_params compr_params = { };
 272         int ret;
 273
 274         /*
 275          * Configure the DMA engine 2-stage transfer mode. Channel 1 set as the
 276          * destination channel, and channel 0 set as the source channel, that
 277          * means once the source channel's transaction is done, it will trigger
 278          * the destination channel's transaction automatically.
 279          */
 280         ret = sprd_platform_compr_dma_config(component, cstream, params, 1);
 281         if (ret) {
 282                 dev_err(dev, "failed to config stage 1 DMA: %d\n", ret);
 283                 return ret;
 284         }
 285
 286         ret = sprd_platform_compr_dma_config(component, cstream, params, 0);
 287         if (ret) {
 288                 dev_err(dev, "failed to config stage 0 DMA: %d\n", ret);
 289                 goto config_err;
 290         }
 291
 292         compr_params.direction = cstream->direction;
 293         compr_params.sample_rate = params->codec.sample_rate;
 294         compr_params.channels = stream->num_channels;
 295         compr_params.info_phys = stream->info_phys;
 296         compr_params.info_size = stream->info_size;
 297         compr_params.rate = params->codec.bit_rate;
 298         compr_params.format = params->codec.id;
 299
 300         ret = stream->compr_ops->set_params(cstream->direction, &compr_params);
 301         if (ret) {
 302                 dev_err(dev, "failed to set parameters: %d\n", ret);
 303                 goto params_err;
 304         }
 305
 306         return 0;
 307
 308 params_err:
 309         dma_release_channel(stream->dma[0].chan);
 310 config_err:
 311         dma_release_channel(stream->dma[1].chan);
 312         return ret;
 313 }
 314
 315 static int sprd_platform_compr_open(struct snd_soc_component *component,
 316                                     struct snd_compr_stream *cstream)
 317 {
 318         struct snd_compr_runtime *runtime = cstream->runtime;
 319         struct snd_soc_pcm_runtime *rtd = cstream->private_data;
 320         struct device *dev = component->dev;
 321         struct sprd_compr_data *data = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
 322         struct sprd_compr_stream *stream;
 323         struct sprd_compr_callback cb;
 324         int stream_id = cstream->direction, ret;
 325
 326         ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
 327         if (ret)
 328                 return ret;
 329
 330         stream = devm_kzalloc(dev, sizeof(*stream), GFP_KERNEL);
 331         if (!stream)
 332                 return -ENOMEM;
 333
 334         stream->cstream = cstream;
 335         stream->num_channels = 2;
 336         stream->compr_ops = data->ops;
 337
 338         /*
 339          * Allocate the stage 0 IRAM buffer size, including the DMA 0
 340          * link-list size and play information of DSP address size.
 341          */
 342         ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_IRAM, dev,
 343                                   SPRD_COMPR_IRAM_SIZE, &stream->iram_buffer);
 344         if (ret < 0)
 345                 goto err_iram;
 346
 347         /* Use to save link-list configuration for DMA 0. */
 348         stream->dma[0].virt = stream->iram_buffer.area + SPRD_COMPR_IRAM_SIZE;
 349         stream->dma[0].phys = stream->iram_buffer.addr + SPRD_COMPR_IRAM_SIZE;
 350
 351         /* Use to update the current data offset of DSP. */
 352         stream->info_phys = stream->iram_buffer.addr + SPRD_COMPR_IRAM_SIZE +
 353                 SPRD_COMPR_IRAM_LINKLIST_SIZE;
 354         stream->info_area = stream->iram_buffer.area + SPRD_COMPR_IRAM_SIZE +
 355                 SPRD_COMPR_IRAM_LINKLIST_SIZE;
 356         stream->info_size = SPRD_COMPR_IRAM_INFO_SIZE;
 357
 358         /*
 359          * Allocate the stage 1 DDR buffer size, including the DMA 1 link-list
 360          * size.
 361          */
 362         ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, dev,
 363                                   SPRD_COMPR_AREA_SIZE, &stream->compr_buffer);
 364         if (ret < 0)
 365                 goto err_compr;
 366
 367         /* Use to save link-list configuration for DMA 1. */
 368         stream->dma[1].virt = stream->compr_buffer.area + SPRD_COMPR_AREA_SIZE;
 369         stream->dma[1].phys = stream->compr_buffer.addr + SPRD_COMPR_AREA_SIZE;
 370
 371         cb.drain_notify = sprd_platform_compr_drain_notify;
 372         cb.drain_data = cstream;
 373         ret = stream->compr_ops->open(stream_id, &cb);
 374         if (ret) {
 375                 dev_err(dev, "failed to open compress platform: %d\n", ret);
 376                 goto err_open;
 377         }
 378
 379         runtime->private_data = stream;
 380         return 0;
 381
 382 err_open:
 383         snd_dma_free_pages(&stream->compr_buffer);
 384 err_compr:
 385         snd_dma_free_pages(&stream->iram_buffer);
 386 err_iram:
 387         devm_kfree(dev, stream);
 388
 389         return ret;
 390 }
 391
 392 static int sprd_platform_compr_free(struct snd_soc_component *component,
 393                                     struct snd_compr_stream *cstream)
 394 {
 395         struct snd_compr_runtime *runtime = cstream->runtime;
 396         struct sprd_compr_stream *stream = runtime->private_data;
 397         struct device *dev = component->dev;
 398         int stream_id = cstream->direction, i;
 399
 400         for (i = 0; i < stream->num_channels; i++) {
 401                 struct sprd_compr_dma *dma = &stream->dma[i];
 402
 403                 if (dma->chan) {
 404                         dma_release_channel(dma->chan);
 405                         dma->chan = NULL;
 406                 }
 407         }
 408
 409         snd_dma_free_pages(&stream->compr_buffer);
 410         snd_dma_free_pages(&stream->iram_buffer);
 411
 412         stream->compr_ops->close(stream_id);
 413
 414         devm_kfree(dev, stream);
 415         return 0;
 416 }
 417
 418 static int sprd_platform_compr_trigger(struct snd_soc_component *component,
 419                                        struct snd_compr_stream *cstream,
 420                                        int cmd)
 421 {
 422         struct snd_compr_runtime *runtime = cstream->runtime;
 423         struct sprd_compr_stream *stream = runtime->private_data;
 424         struct device *dev = component->dev;
 425         int channels = stream->num_channels, ret = 0, i;
 426         int stream_id = cstream->direction;
 427
 428         if (cstream->direction != SND_COMPRESS_PLAYBACK) {
 429                 dev_err(dev, "unsupported compress direction\n");
 430                 return -EINVAL;
 431         }
 432
 433         switch (cmd) {
 434         case SNDRV_PCM_TRIGGER_START:
 435                 for (i = channels - 1; i >= 0; i--) {
 436                         struct sprd_compr_dma *dma = &stream->dma[i];
 437
 438                         if (!dma->desc)
 439                                 continue;
 440
 441                         dma->cookie = dmaengine_submit(dma->desc);
 442                         ret = dma_submit_error(dma->cookie);
 443                         if (ret) {
 444                                 dev_err(dev, "failed to submit request: %d\n",
 445                                         ret);
 446                                 return ret;
 447                         }
 448                 }
 449
 450                 for (i = channels - 1; i >= 0; i--) {
 451                         struct sprd_compr_dma *dma = &stream->dma[i];
 452
 453                         if (dma->chan)
 454                                 dma_async_issue_pending(dma->chan);
 455                 }
 456
 457                 ret = stream->compr_ops->start(stream_id);
 458                 break;
 459
 460         case SNDRV_PCM_TRIGGER_STOP:
 461                 for (i = channels - 1; i >= 0; i--) {
 462                         struct sprd_compr_dma *dma = &stream->dma[i];
 463
 464                         if (dma->chan)
 465                                 dmaengine_terminate_async(dma->chan);
 466                 }
 467
 468                 stream->copied_total = 0;
 469                 stream->stage1_pointer  = 0;
 470                 stream->received_total = 0;
 471                 stream->received_stage0 = 0;
 472                 stream->received_stage1 = 0;
 473
 474                 ret = stream->compr_ops->stop(stream_id);
 475                 break;
 476
 477         case SNDRV_PCM_TRIGGER_SUSPEND:
 478         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 479                 for (i = channels - 1; i >= 0; i--) {
 480                         struct sprd_compr_dma *dma = &stream->dma[i];
 481
 482                         if (dma->chan)
 483                                 dmaengine_pause(dma->chan);
 484                 }
 485
 486                 ret = stream->compr_ops->pause(stream_id);
 487                 break;
 488
 489         case SNDRV_PCM_TRIGGER_RESUME:
 490         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 491                 for (i = channels - 1; i >= 0; i--) {
 492                         struct sprd_compr_dma *dma = &stream->dma[i];
 493
 494                         if (dma->chan)
 495                                 dmaengine_resume(dma->chan);
 496                 }
 497
 498                 ret = stream->compr_ops->pause_release(stream_id);
 499                 break;
 500
 501         case SND_COMPR_TRIGGER_PARTIAL_DRAIN:
 502         case SND_COMPR_TRIGGER_DRAIN:
 503                 ret = stream->compr_ops->drain(stream->received_total);
 504                 break;
 505
 506         default:
 507                 ret = -EINVAL;
 508                 break;
 509         }
 510
 511         return ret;
 512 }
 513
 514 static int sprd_platform_compr_pointer(struct snd_soc_component *component,
 515                                        struct snd_compr_stream *cstream,
 516                                        struct snd_compr_tstamp *tstamp)
 517 {
 518         struct snd_compr_runtime *runtime = cstream->runtime;
 519         struct sprd_compr_stream *stream = runtime->private_data;
 520         struct sprd_compr_playinfo *info =
 521                 (struct sprd_compr_playinfo *)stream->info_area;
 522
 523         tstamp->copied_total = stream->copied_total;
 524         tstamp->pcm_io_frames = info->current_data_offset;
 525
 526         return 0;
 527 }
 528
 529 static int sprd_platform_compr_copy(struct snd_soc_component *component,
 530                                     struct snd_compr_stream *cstream,
 531                                     char __user *buf, size_t count)
 532 {
 533         struct snd_compr_runtime *runtime = cstream->runtime;
 534         struct sprd_compr_stream *stream = runtime->private_data;
 535         int avail_bytes, data_count = count;
 536         void *dst;
 537
 538         /*
 539          * We usually set fragment size as 32K, and the stage 0 IRAM buffer
 540          * size is 32K too. So if now the received data size of the stage 0
 541          * IRAM buffer is less than 32K, that means we have some available
 542          * spaces for the stage 0 IRAM buffer.
 543          */
 544         if (stream->received_stage0 < runtime->fragment_size) {
 545                 avail_bytes = runtime->fragment_size - stream->received_stage0;
 546                 dst = stream->iram_buffer.area + stream->received_stage0;
 547
 548                 if (avail_bytes >= data_count) {
 549                         /*
 550                          * Copy data to the stage 0 IRAM buffer directly if
 551                          * spaces are enough.
 552                          */
 553                         if (copy_from_user(dst, buf, data_count))
 554                                 return -EFAULT;
 555
 556                         stream->received_stage0 += data_count;
 557                         stream->copied_total += data_count;
 558                         goto copy_done;
 559                 } else {
 560                         /*
 561                          * If the data count is larger than the available spaces
 562                          * of the stage 0 IRAM buffer, we should copy one
 563                          * partial data to the stage 0 IRAM buffer, and copy
 564                          * the left to the stage 1 DDR buffer.
 565                          */
 566                         if (copy_from_user(dst, buf, avail_bytes))
 567                                 return -EFAULT;
 568
 569                         data_count -= avail_bytes;
 570                         stream->received_stage0 += avail_bytes;
 571                         stream->copied_total += avail_bytes;
 572                         buf += avail_bytes;
 573                 }
 574         }
 575
 576         /*
 577          * Copy data to the stage 1 DDR buffer if no spaces for the stage 0 IRAM
 578          * buffer.
 579          */
 580         dst = stream->compr_buffer.area + stream->stage1_pointer;
 581         if (data_count < stream->compr_buffer.bytes - stream->stage1_pointer) {
 582                 if (copy_from_user(dst, buf, data_count))
 583                         return -EFAULT;
 584
 585                 stream->stage1_pointer += data_count;
 586         } else {
 587                 avail_bytes = stream->compr_buffer.bytes - stream->stage1_pointer;
 588
 589                 if (copy_from_user(dst, buf, avail_bytes))
 590                         return -EFAULT;
 591
 592                 if (copy_from_user(stream->compr_buffer.area, buf + avail_bytes,
 593                                    data_count - avail_bytes))
 594                         return -EFAULT;
 595
 596                 stream->stage1_pointer = data_count - avail_bytes;
 597         }
 598
 599         stream->received_stage1 += data_count;
 600
 601 copy_done:
 602         /* Update the copied data size. */
 603         stream->received_total += count;
 604         return count;
 605 }
 606
 607 static int sprd_platform_compr_get_caps(struct snd_soc_component *component,
 608                                         struct snd_compr_stream *cstream,
 609                                         struct snd_compr_caps *caps)
 610 {
 611         caps->direction = cstream->direction;
 612         caps->min_fragment_size = SPRD_COMPR_MIN_FRAGMENT_SIZE;
 613         caps->max_fragment_size = SPRD_COMPR_MAX_FRAGMENT_SIZE;
 614         caps->min_fragments = SPRD_COMPR_MIN_NUM_FRAGMENTS;
 615         caps->max_fragments = SPRD_COMPR_MAX_NUM_FRAGMENTS;
 616         caps->num_codecs = 2;
 617         caps->codecs[0] = SND_AUDIOCODEC_MP3;
 618         caps->codecs[1] = SND_AUDIOCODEC_AAC;
 619
 620         return 0;
 621 }
 622
 623 static int
 624 sprd_platform_compr_get_codec_caps(struct snd_soc_component *component,
 625                                    struct snd_compr_stream *cstream,
 626                                    struct snd_compr_codec_caps *codec)
 627 {
 628         switch (codec->codec) {
 629         case SND_AUDIOCODEC_MP3:
 630                 codec->num_descriptors = 2;
 631                 codec->descriptor[0].max_ch = 2;
 632                 codec->descriptor[0].bit_rate[0] = 320;
 633                 codec->descriptor[0].bit_rate[1] = 128;
 634                 codec->descriptor[0].num_bitrates = 2;
 635                 codec->descriptor[0].profiles = 0;
 636                 codec->descriptor[0].modes = SND_AUDIOCHANMODE_MP3_STEREO;
 637                 codec->descriptor[0].formats = 0;
 638                 break;
 639
 640         case SND_AUDIOCODEC_AAC:
 641                 codec->num_descriptors = 2;
 642                 codec->descriptor[1].max_ch = 2;
 643                 codec->descriptor[1].bit_rate[0] = 320;
 644                 codec->descriptor[1].bit_rate[1] = 128;
 645                 codec->descriptor[1].num_bitrates = 2;
 646                 codec->descriptor[1].profiles = 0;
 647                 codec->descriptor[1].modes = 0;
 648                 codec->descriptor[1].formats = 0;
 649                 break;
 650
 651         default:
 652                 return -EINVAL;
 653         }
 654
 655         return 0;
 656 }
 657
 658 const struct snd_compress_ops sprd_platform_compress_ops = {
 659         .open = sprd_platform_compr_open,
 660         .free = sprd_platform_compr_free,
 661         .set_params = sprd_platform_compr_set_params,
 662         .trigger = sprd_platform_compr_trigger,
 663         .pointer = sprd_platform_compr_pointer,
 664         .copy = sprd_platform_compr_copy,
 665         .get_caps = sprd_platform_compr_get_caps,
 666         .get_codec_caps = sprd_platform_compr_get_codec_caps,
 667 };
 668
 669 MODULE_DESCRIPTION("Spreadtrum ASoC Compress Platform Driver");
 670 MODULE_LICENSE("GPL v2");
 671 MODULE_ALIAS("platform:compress-platform");