Public Git Hosting - drm/drm-misc.git/tree - drivers/accel/habanalabs/include/gaudi2/asic

drwxr-xr-x		..
-rw-r--r--	16170	arc_farm_arc0_acp_eng_regs.h	blob \| blame \| history \| raw
-rw-r--r--	35435	arc_farm_arc0_aux_masks.h	blob \| blame \| history \| raw
-rw-r--r--	17015	arc_farm_arc0_aux_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1747	arc_farm_arc0_dup_eng_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	17743	arc_farm_arc0_dup_eng_regs.h	blob \| blame \| history \| raw
-rw-r--r--	5731	arc_farm_kdma_ctx_axuser_masks.h	blob \| blame \| history \| raw
-rw-r--r--	1655	arc_farm_kdma_ctx_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	8892	arc_farm_kdma_ctx_masks.h	blob \| blame \| history \| raw
-rw-r--r--	2380	arc_farm_kdma_ctx_regs.h	blob \| blame \| history \| raw
-rw-r--r--	709	arc_farm_kdma_kdma_cgm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	16583	arc_farm_kdma_masks.h	blob \| blame \| history \| raw
-rw-r--r--	3883	arc_farm_kdma_regs.h	blob \| blame \| history \| raw
-rw-r--r--	18149	cpu_if_regs.h	blob \| blame \| history \| raw
-rw-r--r--	9763	dcore0_dec0_cmd_masks.h	blob \| blame \| history \| raw
-rw-r--r--	1920	dcore0_dec0_cmd_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1747	dcore0_edma0_core_ctx_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2540	dcore0_edma0_core_ctx_regs.h	blob \| blame \| history \| raw
-rw-r--r--	17899	dcore0_edma0_core_masks.h	blob \| blame \| history \| raw
-rw-r--r--	4167	dcore0_edma0_core_regs.h	blob \| blame \| history \| raw
-rw-r--r--	18743	dcore0_edma0_qm_arc_aux_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1862	dcore0_edma0_qm_axuser_nonsecured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	688	dcore0_edma0_qm_cgm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	51930	dcore0_edma0_qm_masks.h	blob \| blame \| history \| raw
-rw-r--r--	28932	dcore0_edma0_qm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1747	dcore0_edma1_core_ctx_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1862	dcore0_edma1_qm_axuser_nonsecured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	13345	dcore0_hmmu0_mmu_masks.h	blob \| blame \| history \| raw
-rw-r--r--	6841	dcore0_hmmu0_mmu_regs.h	blob \| blame \| history \| raw
-rw-r--r--	15966	dcore0_hmmu0_stlb_masks.h	blob \| blame \| history \| raw
-rw-r--r--	4011	dcore0_hmmu0_stlb_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1755	dcore0_mme_acc_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1040	dcore0_mme_ctrl_lo_arch_agu_cout0_master_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1031	dcore0_mme_ctrl_lo_arch_agu_cout0_slave_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1040	dcore0_mme_ctrl_lo_arch_agu_cout1_master_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1031	dcore0_mme_ctrl_lo_arch_agu_cout1_slave_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1022	dcore0_mme_ctrl_lo_arch_agu_in0_master_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1013	dcore0_mme_ctrl_lo_arch_agu_in0_slave_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1022	dcore0_mme_ctrl_lo_arch_agu_in1_master_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1013	dcore0_mme_ctrl_lo_arch_agu_in1_slave_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1022	dcore0_mme_ctrl_lo_arch_agu_in2_master_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1013	dcore0_mme_ctrl_lo_arch_agu_in2_slave_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1022	dcore0_mme_ctrl_lo_arch_agu_in3_master_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1013	dcore0_mme_ctrl_lo_arch_agu_in3_slave_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1022	dcore0_mme_ctrl_lo_arch_agu_in4_master_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1013	dcore0_mme_ctrl_lo_arch_agu_in4_slave_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1130	dcore0_mme_ctrl_lo_arch_base_addr_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2402	dcore0_mme_ctrl_lo_arch_non_tensor_end_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1098	dcore0_mme_ctrl_lo_arch_non_tensor_start_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2125	dcore0_mme_ctrl_lo_arch_tensor_a_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2125	dcore0_mme_ctrl_lo_arch_tensor_b_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2203	dcore0_mme_ctrl_lo_arch_tensor_cout_regs.h	blob \| blame \| history \| raw
-rw-r--r--	22050	dcore0_mme_ctrl_lo_masks.h	blob \| blame \| history \| raw
-rw-r--r--	1770	dcore0_mme_ctrl_lo_mme_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	4447	dcore0_mme_ctrl_lo_regs.h	blob \| blame \| history \| raw
-rw-r--r--	17274	dcore0_mme_qm_arc_acp_eng_regs.h	blob \| blame \| history \| raw
-rw-r--r--	18167	dcore0_mme_qm_arc_aux_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1839	dcore0_mme_qm_arc_dup_eng_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	18863	dcore0_mme_qm_arc_dup_eng_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1816	dcore0_mme_qm_axuser_nonsecured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1747	dcore0_mme_qm_axuser_secured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	674	dcore0_mme_qm_cgm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	27890	dcore0_mme_qm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	3486	dcore0_mme_sbte0_masks.h	blob \| blame \| history \| raw
-rw-r--r--	1816	dcore0_mme_sbte0_mstr_if_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1770	dcore0_mme_wb0_mstr_if_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	8091	dcore0_rtr0_ctrl_regs.h	blob \| blame \| history \| raw
-rw-r--r--	7682	dcore0_rtr0_mstr_if_rr_prvt_hbw_regs.h	blob \| blame \| history \| raw
-rw-r--r--	6683	dcore0_rtr0_mstr_if_rr_prvt_lbw_regs.h	blob \| blame \| history \| raw
-rw-r--r--	7682	dcore0_rtr0_mstr_if_rr_shrd_hbw_regs.h	blob \| blame \| history \| raw
-rw-r--r--	6683	dcore0_rtr0_mstr_if_rr_shrd_lbw_regs.h	blob \| blame \| history \| raw
-rw-r--r--	5332	dcore0_sync_mngr_glbl_masks.h	blob \| blame \| history \| raw
-rw-r--r--	34068	dcore0_sync_mngr_glbl_regs.h	blob \| blame \| history \| raw
-rw-r--r--	6410	dcore0_sync_mngr_mstr_if_axuser_masks.h	blob \| blame \| history \| raw
-rw-r--r--	1816	dcore0_sync_mngr_mstr_if_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	3557	dcore0_sync_mngr_objs_masks.h	blob \| blame \| history \| raw
-rw-r--r--	1256314	dcore0_sync_mngr_objs_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1609	dcore0_tpc0_cfg_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	3500	dcore0_tpc0_cfg_kernel_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1966	dcore0_tpc0_cfg_kernel_tensor_0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	22268	dcore0_tpc0_cfg_masks.h	blob \| blame \| history \| raw
-rw-r--r--	3272	dcore0_tpc0_cfg_qm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	716	dcore0_tpc0_cfg_qm_sync_object_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1870	dcore0_tpc0_cfg_qm_tensor_0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	5995	dcore0_tpc0_cfg_regs.h	blob \| blame \| history \| raw
-rw-r--r--	5228	dcore0_tpc0_cfg_special_regs.h	blob \| blame \| history \| raw
-rw-r--r--	4177	dcore0_tpc0_eml_busmon_0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2614	dcore0_tpc0_eml_etf_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1852	dcore0_tpc0_eml_funnel_regs.h	blob \| blame \| history \| raw
-rw-r--r--	3742	dcore0_tpc0_eml_spmu_regs.h	blob \| blame \| history \| raw
-rw-r--r--	3160	dcore0_tpc0_eml_stm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	18455	dcore0_tpc0_qm_arc_aux_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1839	dcore0_tpc0_qm_axuser_nonsecured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	681	dcore0_tpc0_qm_cgm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	28411	dcore0_tpc0_qm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1862	dcore0_vdec0_brdg_ctrl_axuser_dec_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2023	dcore0_vdec0_brdg_ctrl_axuser_msix_abnrm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1977	dcore0_vdec0_brdg_ctrl_axuser_msix_l2c_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1977	dcore0_vdec0_brdg_ctrl_axuser_msix_nrm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1977	dcore0_vdec0_brdg_ctrl_axuser_msix_vcd_regs.h	blob \| blame \| history \| raw
-rw-r--r--	28146	dcore0_vdec0_brdg_ctrl_masks.h	blob \| blame \| history \| raw
-rw-r--r--	7529	dcore0_vdec0_brdg_ctrl_regs.h	blob \| blame \| history \| raw
-rw-r--r--	5398	dcore0_vdec0_ctrl_special_regs.h	blob \| blame \| history \| raw
-rw-r--r--	4447	dcore1_mme_ctrl_lo_regs.h	blob \| blame \| history \| raw
-rw-r--r--	34068	dcore1_sync_mngr_glbl_regs.h	blob \| blame \| history \| raw
-rw-r--r--	4447	dcore3_mme_ctrl_lo_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2456864	gaudi2_blocks_linux_driver.h	blob \| blame \| history \| raw
-rw-r--r--	26210	gaudi2_regs.h	blob \| blame \| history \| raw
-rw-r--r--	639	nic0_qm0_cgm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	25285	nic0_qm0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	16727	nic0_qm_arc_aux0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	22207	nic0_qpc0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	757	nic0_umr0_0_completion_queue_ci_1_regs.h	blob \| blame \| history \| raw
-rw-r--r--	893	nic0_umr0_0_unsecure_doorbell0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	6788	pcie_aux_regs.h	blob \| blame \| history \| raw
-rw-r--r--	11032	pcie_dbi_regs.h	blob \| blame \| history \| raw
-rw-r--r--	9405	pcie_dec0_cmd_masks.h	blob \| blame \| history \| raw
-rw-r--r--	1850	pcie_dec0_cmd_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1816	pcie_vdec0_brdg_ctrl_axuser_dec_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1977	pcie_vdec0_brdg_ctrl_axuser_msix_abnrm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1931	pcie_vdec0_brdg_ctrl_axuser_msix_l2c_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1931	pcie_vdec0_brdg_ctrl_axuser_msix_nrm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1931	pcie_vdec0_brdg_ctrl_axuser_msix_vcd_regs.h	blob \| blame \| history \| raw
-rw-r--r--	27248	pcie_vdec0_brdg_ctrl_masks.h	blob \| blame \| history \| raw
-rw-r--r--	7299	pcie_vdec0_brdg_ctrl_regs.h	blob \| blame \| history \| raw
-rw-r--r--	5228	pcie_vdec0_ctrl_special_regs.h	blob \| blame \| history \| raw
-rw-r--r--	14625	pcie_wrap_regs.h	blob \| blame \| history \| raw
-rw-r--r--	4718	pcie_wrap_special_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1586	pdma0_core_ctx_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2260	pdma0_core_ctx_regs.h	blob \| blame \| history \| raw
-rw-r--r--	15596	pdma0_core_masks.h	blob \| blame \| history \| raw
-rw-r--r--	3670	pdma0_core_regs.h	blob \| blame \| history \| raw
-rw-r--r--	5901	pdma0_core_special_masks.h	blob \| blame \| history \| raw
-rw-r--r--	16727	pdma0_qm_arc_aux_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1701	pdma0_qm_axuser_nonsecured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1632	pdma0_qm_axuser_secured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	639	pdma0_qm_cgm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	45224	pdma0_qm_masks.h	blob \| blame \| history \| raw
-rw-r--r--	25285	pdma0_qm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1586	pdma1_core_ctx_axuser_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1701	pdma1_qm_axuser_nonsecured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	14946	pmmu_hbw_stlb_masks.h	blob \| blame \| history \| raw
-rw-r--r--	3759	pmmu_hbw_stlb_regs.h	blob \| blame \| history \| raw
-rw-r--r--	3233	pmmu_pif_regs.h	blob \| blame \| history \| raw
-rw-r--r--	10146	psoc_etr_masks.h	blob \| blame \| history \| raw
-rw-r--r--	2222	psoc_etr_regs.h	blob \| blame \| history \| raw
-rw-r--r--	65347	psoc_global_conf_masks.h	blob \| blame \| history \| raw
-rw-r--r--	35389	psoc_global_conf_regs.h	blob \| blame \| history \| raw
-rw-r--r--	100195	psoc_reset_conf_masks.h	blob \| blame \| history \| raw
-rw-r--r--	27900	psoc_reset_conf_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1251	psoc_timestamp_regs.h	blob \| blame \| history \| raw
-rw-r--r--	3262	rot0_desc_regs.h	blob \| blame \| history \| raw
-rw-r--r--	9894	rot0_masks.h	blob \| blame \| history \| raw
-rw-r--r--	16439	rot0_qm_arc_aux_regs.h	blob \| blame \| history \| raw
-rw-r--r--	1678	rot0_qm_axuser_nonsecured_regs.h	blob \| blame \| history \| raw
-rw-r--r--	632	rot0_qm_cgm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	24764	rot0_qm_regs.h	blob \| blame \| history \| raw
-rw-r--r--	2180	rot0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	4834	xbar_edge_0_regs.h	blob \| blame \| history \| raw
-rw-r--r--	4742	xbar_mid_0_regs.h	blob \| blame \| history \| raw