Merge pull request #218 from saper/build-fixes
[envytools.git] / envydis / vcomp.c
blob4e71383ab82f66353a49518472f8ae188e15dd22
1 /*
2 * Copyright (C) 2013 Marcelina Koƛcielnicka <mwk@0x04.net>
3 * All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #include "dis-intern.h"
27 static struct rbitfield ctargoff = { 8, 6, 17, 2 };
28 #define BTARG atombtarg, &ctargoff
29 #define CTARG atomctarg, &ctargoff
30 static struct rbitfield limmoff = { 8, 6, 17, 6 };
31 static struct rbitfield immoff = { 17, 6 };
32 #define LIMM atomimm, &limmoff
33 #define IMM atomimm, &immoff
35 static struct bitfield src1_bf = { 8, 3 };
36 static struct bitfield src2_bf = { 11, 3 };
37 static struct bitfield dst_bf = { 14, 3 };
38 static struct bitfield psrc1_bf = { 8, 2 };
39 static struct bitfield psrc2_bf = { 11, 2 };
40 static struct bitfield pdst_bf = { 14, 2 };
42 static struct reg src1_r = { &src1_bf, "r" };
43 static struct reg src2_r = { &src2_bf, "r" };
44 static struct reg dst_r = { &dst_bf, "r" };
45 static struct reg memidx_r = { 0, "memidx" };
46 static struct reg ififo_r = { 0, "ififo" };
47 #define SRC1 atomreg, &src1_r
48 #define SRC2 atomreg, &src2_r
49 #define DST atomreg, &dst_r
50 #define MEMIDX atomreg, &memidx_r
51 #define IFIFO atomreg, &ififo_r
52 static struct sreg pred_sr[] = {
53 { 3, "irq" },
54 { -1 },
56 static struct reg psrc1_r = { &psrc1_bf, "p", .specials = pred_sr };
57 static struct reg psrc2_r = { &psrc2_bf, "p", .specials = pred_sr };
58 static struct reg pdst_r = { &pdst_bf, "p", .specials = pred_sr };
59 static struct reg pred_r = { 0, "p0" };
60 #define PSRC1 atomreg, &psrc1_r
61 #define PSRC2 atomreg, &psrc2_r
62 #define PDST atomreg, &pdst_r
63 #define PRED atomreg, &pred_r
65 static struct rbitfield memoff = { 17, 6 };
66 static struct mem mem0_m = { "M0", 0, &memidx_r };
67 static struct mem mem1_m = { "M1", 0, &memidx_r };
68 static struct mem mem2_m = { "M2", 0, &memidx_r };
69 static struct mem mem3_m = { "M3", 0, &memidx_r };
70 static struct mem datar_m = { "D", 0, &src2_r };
71 static struct mem datai_m = { "D", 0, 0, &memoff };
72 static struct mem outr_m = { "O", 0, &src2_r };
73 static struct mem outi_m = { "O", 0, 0, &memoff };
74 #define MEM0 atommem, &mem0_m
75 #define MEM1 atommem, &mem1_m
76 #define MEM2 atommem, &mem2_m
77 #define MEM3 atommem, &mem3_m
78 #define DATAR atommem, &datar_m
79 #define DATAI atommem, &datai_m
80 #define OUTR atommem, &outr_m
81 #define OUTI atommem, &outi_m
83 static struct insn tabpdst[] = {
84 { 0x000000, 0x010000, PDST },
85 { 0x010000, 0x010000, N("not"), PDST },
86 { 0, 0, OOPS },
89 static struct insn tabpsrc1[] = {
90 { 0x000000, 0x000400, PSRC1 },
91 { 0x000400, 0x000400, N("not"), PSRC1 },
92 { 0, 0, OOPS },
95 static struct insn tabpsrc2[] = {
96 { 0x000000, 0x002000, PSRC2 },
97 { 0x002000, 0x002000, N("not"), PSRC2 },
98 { 0, 0, OOPS },
101 static struct insn tabsrc2[] = {
102 { 0x000000, 0x000040, SRC2 },
103 { 0x000040, 0x000040, IMM },
104 { 0, 0, OOPS },
107 static struct insn tablsrc2[] = {
108 { 0x000000, 0x000040, SRC2 },
109 { 0x000040, 0x000040, LIMM },
110 { 0, 0, OOPS },
113 static int ignimm[] = { 6, 1 };
114 #define IGNIMM atomign, ignimm
116 static struct insn tabpred[] = {
117 { 0x000000, 0x000080 },
118 { 0x000080, 0x000080, PRED },
119 { 0, 0, OOPS },
122 static struct insn tabldmem[] = {
123 { 0x000000, 0x000700, IGNIMM, MEM0 },
124 { 0x000100, 0x000700, IGNIMM, MEM1 },
125 { 0x000200, 0x000700, IGNIMM, MEM2 },
126 { 0x000300, 0x000700, IGNIMM, MEM3 },
127 { 0x000400, 0x000740, DATAR },
128 { 0x000440, 0x000740, DATAI },
129 { 0x000600, 0x000700, IGNIMM, MEMIDX },
130 { 0x000700, 0x000700, IGNIMM, IFIFO },
131 { 0, 0, OOPS },
134 static struct insn tabstmem[] = {
135 { 0x000000, 0x01c000, IGNIMM, MEM0 },
136 { 0x004000, 0x01c000, IGNIMM, MEM1 },
137 { 0x008000, 0x01c000, IGNIMM, MEM2 },
138 { 0x00c000, 0x01c000, IGNIMM, MEM3 },
139 { 0x010000, 0x01c040, DATAR },
140 { 0x010040, 0x01c040, DATAI },
141 { 0x014000, 0x01c040, OUTR },
142 { 0x014040, 0x01c040, OUTI },
143 { 0x018000, 0x01c000, IGNIMM, MEMIDX },
144 { 0, 0, OOPS },
147 static struct insn tabm[] = {
148 { 0x000000, 0x00003f, T(pred), N("add"), DST, SRC1, T(src2) },
149 { 0x000001, 0x00003f, T(pred), N("sub"), DST, SRC1, T(src2) },
150 { 0x000002, 0x00003f, T(pred), N("sar"), DST, SRC1, T(src2) }, /* only low 6 bits of SRC2 used */
151 { 0x000003, 0x00003f, T(pred), N("shl"), DST, SRC1, T(src2) }, /* only low 6 bits of SRC2 used */
152 { 0x000004, 0x00003f, T(pred), N("and"), DST, SRC1, T(src2) },
153 { 0x000005, 0x00003f, T(pred), N("or"), DST, SRC1, T(src2) },
154 { 0x000006, 0x00003f, T(pred), N("xor"), DST, SRC1, T(src2) },
155 { 0x000007, 0x00003f, T(pred), N("not"), DST, SRC1 },
156 { 0x000008, 0x00003f, T(pred), N("mov"), DST, T(lsrc2) },
157 { 0x000009, 0x00003f, T(pred), N("hswap"), DST, SRC1 }, /* swap bits 0-15 with 16-31 ... */
158 { 0x00000a, 0x00003f, T(pred), N("min"), DST, SRC1, T(src2) },
159 { 0x00000b, 0x00003f, T(pred), N("max"), DST, SRC1, T(src2) },
160 { 0x00000c, 0x00003f, T(pred), N("setgt"), T(pdst), SRC1, T(src2) },
161 { 0x00000d, 0x00003f, T(pred), N("setlt"), T(pdst), SRC1, T(src2) },
162 { 0x00000e, 0x00003f, T(pred), N("seteq"), T(pdst), SRC1, T(src2) },
163 { 0x00000f, 0x00003f, T(pred), N("btest"), T(pdst), SRC1, T(src2) },
164 { 0x000010, 0x00003f, T(pred), N("and"), T(pdst), T(psrc1), T(psrc2) },
165 { 0x000011, 0x00003f, T(pred), N("or"), T(pdst), T(psrc1), T(psrc2) },
166 { 0x000012, 0x00003f, T(pred), N("xor"), T(pdst), T(psrc1), T(psrc2) },
167 { 0x000013, 0x00003f, T(pred), N("mov"), T(pdst), T(psrc1) },
168 { 0x000014, 0x00003f, T(pred), N("set"), T(pdst) }, /* set to 1... */
169 { 0x000015, 0x00003f, T(pred), N("exp2"), DST, T(src2) }, /* DST = 1 << (SRC2 & 0x3f) */
170 { 0x000016, 0x00003f, T(pred), N("exp2m1"), DST, T(src2) }, /* DST = 1 << ((SRC2 & 0x3f)) - 1 */
171 { 0x000020, 0x00003f, N("ldu"), DST, T(ldmem) },
172 { 0x000021, 0x00003f, N("lds"), DST, T(ldmem) },
173 { 0x000022, 0x00003f, N("st"), T(stmem), SRC1 },
174 { 0x000024, 0x00003f, N("div"), DST, SRC1, T(src2) }, /* s48 by u16 -> s48, -1 on div-by-0 */
175 { 0x000025, 0x00003f, IGNIMM, N("mulsrr"), DST, SRC1, SRC2, IMM }, /* s48 by s16, then shift + round up */
176 { 0x000026, 0x00003f, IGNIMM, N("sleep") },
177 { 0x000028, 0x00003f, IGNIMM, N("bra"), BTARG },
178 { 0x00002a, 0x00003f, IGNIMM, SESTART, N("not"), PDST, SEEND, N("bra"), BTARG },
179 { 0x00002b, 0x00003f, IGNIMM, PDST, N("bra"), BTARG },
180 { 0x00002c, 0x00003f, IGNIMM, N("bra"), BTARG }, /* XXX wtf? */
181 { 0x00002e, 0x00003f, IGNIMM, N("call"), CTARG },
182 { 0x00002f, 0x00003f, IGNIMM, N("ret") },
183 { 0, 0, OOPS },
186 static struct insn tabroot[] = {
187 { 0, 0, OP1B, T(m) },
190 struct disisa vcomp_isa_s = {
191 tabroot,