completely wrong. Chebychev (Remez), Padé, and maybe Taylor.
[fmap.git] / x86_64_sse2_x87 / fasm / examples / x86 / include / ext / avx512_vbmi2.inc
bloba4b00b6774e69a7a39a0e25a4d34a9cb31772d8b
1 \r
2 if ~ defined AVX_512\r
3 \r
4         include 'avx512f.inc'\r
5 \r
6 end if\r
7 \r
8 iterate <instr,vex_mpw,opcode>, vpshldw,VEX_66_0F3A_W1,70h, vpshrdw,VEX_66_0F3A_W1,72h\r
9 \r
10         macro instr? dest*,src*,src2*,aux*&\r
11                 AVX_512.basic_instruction_imm8 vex_mpw,EVEX_REQUIRED+EVEX_VL,opcode,0,dest,src,src2,aux\r
12         end macro\r
14 end iterate\r
16 iterate <instr,unit,vex_mpw,opcode>, vpshldd,4,VEX_66_0F3A_W0,71h, vpshldq,8,VEX_66_0F3A_W1,71h, \\r
17                                      vpshrdd,4,VEX_66_0F3A_W0,73h, vpshrdq,8,VEX_66_0F3A_W1,73h\r
19         macro instr? dest*,src*,src2*,aux*&\r
20                 AVX_512.basic_instruction_bcst_imm8 vex_mpw,EVEX_REQUIRED+EVEX_VL,opcode,unit,dest,src,src2,aux\r
21         end macro\r
23 end iterate\r
25 iterate <instr,vex_mpw,opcode>, vpshldvw,VEX_66_0F38_W1,70h, vpshrdvw,VEX_66_0F38_W1,72h\r
27         macro instr? dest*,src*,src2*\r
28                 AVX_512.basic_instruction vex_mpw,EVEX_REQUIRED+EVEX_VL,opcode,0,dest,src,src2\r
29         end macro\r
31 end iterate\r
33 iterate <instr,unit,vex_mpw,opcode>, vpshldvd,4,VEX_66_0F38_W0,71h, vpshldvq,8,VEX_66_0F38_W1,71h, \\r
34                                      vpshrdvd,4,VEX_66_0F38_W0,73h, vpshrdvq,8,VEX_66_0F38_W1,73h\r
36         macro instr? dest*,src*,src2*\r
37                 AVX_512.basic_instruction_bcst vex_mpw,EVEX_REQUIRED+EVEX_VL,opcode,unit,dest,src,src2\r
38         end macro\r
40 end iterate\r
42 iterate <instr,vex_mpw,opcode>, vpcompressb,VEX_66_0F38_W0,63h, vpcompressw,VEX_66_0F38_W1,63h\r
44         macro instr? dest*,src*\r
45                 AVX_512.parse_operand_k1z @dest,dest\r
46                 AVX_512.parse_operand @src,src\r
47                 if (@dest.type = 'mmreg' | @dest.type = 'mem') & @src.type = 'mmreg'\r
48                         if @dest.size and not @src.size\r
49                                 err 'operand sizes do not match'\r
50                         end if\r
51                         AVX_512.store_instruction @src.size,vex_mpw,EVEX_REQUIRED+EVEX_VL,opcode,@dest,@dest.mask,@src.rm\r
52                 else\r
53                         err 'invalid combination of operands'\r
54                 end if\r
55         end macro\r
57 end iterate\r
59 iterate <instr,vex_mpw,opcode>, vpexpandb,VEX_66_0F38_W0,62h, vpexpandw,VEX_66_0F38_W1,62h\r
61         macro instr? dest*,src*\r
62                 AVX_512.single_source_instruction vex_mpw,EVEX_REQUIRED+EVEX_VL,opcode,0,dest,src\r
63         end macro\r
65 end iterate\r