| blob | 5126715cce7e914ce30082b3b816913791badbfb |
1 set_global_assignment -name PROJECT_SHOW_ENTITY_NAME On\r
2 set_global_assignment -name PROJECT_USE_SIMPLIFIED_NAMES Off\r
3 set_global_assignment -name ENABLE_REDUCED_MEMORY_MODE Off\r
4 set_global_assignment -name VER_COMPATIBLE_DB_DIR export_db\r
5 set_global_assignment -name AUTO_EXPORT_VER_COMPATIBLE_DB Off\r
6 set_global_assignment -name SMART_RECOMPILE Off\r
7 set_global_assignment -name FLOW_DISABLE_ASSEMBLER Off\r
8 set_global_assignment -name FLOW_ENABLE_HCII_COMPARE Off\r
9 set_global_assignment -name HCII_OUTPUT_DIR hc_output\r
10 set_global_assignment -name SAVE_MIGRATION_INFO_DURING_COMPILATION Off\r
11 set_global_assignment -name FLOW_ENABLE_IO_ASSIGNMENT_ANALYSIS Off\r
12 set_global_assignment -name RUN_FULL_COMPILE_ON_DEVICE_CHANGE On\r
13 set_global_assignment -name NUM_PARALLEL_PROCESSORS 1\r
14 set_global_assignment -name FLOW_ENABLE_RTL_VIEWER Off\r
15 set_global_assignment -name READ_OR_WRITE_IN_BYTE_ADDRESS "Use global settings"\r
16 set_global_assignment -name FLOW_HARDCOPY_DESIGN_READINESS_CHECK On\r
17 set_global_assignment -name DEFAULT_HOLD_MULTICYCLE "Same as Multicycle"\r
18 set_global_assignment -name CUT_OFF_PATHS_BETWEEN_CLOCK_DOMAINS On\r
19 set_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS On\r
20 set_global_assignment -name CUT_OFF_IO_PIN_FEEDBACK On\r
21 set_global_assignment -name DO_COMBINED_ANALYSIS Off\r
22 set_global_assignment -name IGNORE_CLOCK_SETTINGS Off\r
23 set_global_assignment -name ANALYZE_LATCHES_AS_SYNCHRONOUS_ELEMENTS On\r
24 set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS Off\r
25 set_global_assignment -name ENABLE_CLOCK_LATENCY Off\r
26 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family ACEX1K\r
27 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX7000B\r
28 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "HardCopy II"\r
29 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX10KA\r
30 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family TGX\r
31 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Cyclone III"\r
32 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "HardCopy Stratix"\r
33 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family APEX20KE\r
34 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX7000AE\r
35 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family Cyclone\r
36 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Stratix II GX"\r
37 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX10K\r
38 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "MAX II"\r
39 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family APEX20KC\r
40 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Stratix GX"\r
41 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family HCX\r
42 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX7000S\r
43 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX6000\r
44 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "APEX II"\r
45 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family FLEX10KE\r
46 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Cyclone II"\r
47 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Stratix III"\r
48 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER On -family "Arria GX"\r
49 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family MAX3000A\r
50 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family "Stratix II"\r
51 set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER Off -family Stratix\r
52 set_global_assignment -name NUMBER_OF_SOURCES_PER_DESTINATION_TO_REPORT 10\r
53 set_global_assignment -name NUMBER_OF_DESTINATION_TO_REPORT 10\r
54 set_global_assignment -name NUMBER_OF_PATHS_TO_REPORT 200\r
55 set_global_assignment -name DO_MIN_ANALYSIS Off\r
56 set_global_assignment -name DO_MIN_TIMING Off\r
57 set_global_assignment -name REPORT_IO_PATHS_SEPARATELY Off\r
58 set_global_assignment -name FLOW_ENABLE_TIMING_CONSTRAINT_CHECK Off\r
59 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family ACEX1K\r
60 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX7000B\r
61 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "HardCopy II"\r
62 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX10KA\r
63 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family TGX\r
64 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Cyclone III"\r
65 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "HardCopy Stratix"\r
66 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family APEX20KE\r
67 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX7000AE\r
68 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family Cyclone\r
69 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Stratix II GX"\r
70 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX10K\r
71 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "MAX II"\r
72 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family APEX20KC\r
73 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "Stratix GX"\r
74 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family HCX\r
75 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX7000S\r
76 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX6000\r
77 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family "APEX II"\r
78 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family FLEX10KE\r
79 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Cyclone II"\r
80 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Stratix III"\r
81 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Arria GX"\r
82 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family MAX3000A\r
83 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS On -family "Stratix II"\r
84 set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS Off -family Stratix\r
85 set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING Off\r
86 set_global_assignment -name MUX_RESTRUCTURE Auto\r
87 set_global_assignment -name ENABLE_IP_DEBUG Off\r
88 set_global_assignment -name SAVE_DISK_SPACE On\r
89 set_global_assignment -name DISABLE_OCP_HW_EVAL Off\r
90 set_global_assignment -name DEVICE_FILTER_PACKAGE Any\r
91 set_global_assignment -name DEVICE_FILTER_PIN_COUNT Any\r
92 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE Any\r
93 set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL "<None>"\r
94 set_global_assignment -name VERILOG_INPUT_VERSION Verilog_2001\r
95 set_global_assignment -name VHDL_INPUT_VERSION VHDL93\r
96 set_global_assignment -name FAMILY -value Stratix\r
97 set_global_assignment -name TRUE_WYSIWYG_FLOW Off\r
98 set_global_assignment -name SMART_COMPILE_IGNORES_TDC_FOR_STRATIX_PLL_CHANGES Off\r
99 set_global_assignment -name STATE_MACHINE_PROCESSING Auto\r
100 set_global_assignment -name SAFE_STATE_MACHINE Off\r
101 set_global_assignment -name EXTRACT_VERILOG_STATE_MACHINES On\r
102 set_global_assignment -name EXTRACT_VHDL_STATE_MACHINES On\r
103 set_global_assignment -name IGNORE_VERILOG_INITIAL_CONSTRUCTS Off\r
104 set_global_assignment -name ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS On\r
105 set_global_assignment -name DSP_BLOCK_BALANCING Auto\r
106 set_global_assignment -name MAX_BALANCING_DSP_BLOCKS "-1 (Unlimited)"\r
107 set_global_assignment -name NOT_GATE_PUSH_BACK On\r
108 set_global_assignment -name ALLOW_POWER_UP_DONT_CARE On\r
109 set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS Off\r
110 set_global_assignment -name REMOVE_DUPLICATE_REGISTERS On\r
111 set_global_assignment -name IGNORE_CARRY_BUFFERS Off\r
112 set_global_assignment -name IGNORE_CASCADE_BUFFERS Off\r
113 set_global_assignment -name IGNORE_GLOBAL_BUFFERS Off\r
114 set_global_assignment -name IGNORE_ROW_GLOBAL_BUFFERS Off\r
115 set_global_assignment -name IGNORE_LCELL_BUFFERS Off\r
116 set_global_assignment -name MAX7000_IGNORE_LCELL_BUFFERS AUTO\r
117 set_global_assignment -name IGNORE_SOFT_BUFFERS On\r
118 set_global_assignment -name MAX7000_IGNORE_SOFT_BUFFERS Off\r
119 set_global_assignment -name LIMIT_AHDL_INTEGERS_TO_32_BITS Off\r
120 set_global_assignment -name AUTO_GLOBAL_CLOCK_MAX On\r
121 set_global_assignment -name AUTO_GLOBAL_OE_MAX On\r
122 set_global_assignment -name MAX_AUTO_GLOBAL_REGISTER_CONTROLS On\r
123 set_global_assignment -name AUTO_IMPLEMENT_IN_ROM Off\r
124 set_global_assignment -name APEX20K_TECHNOLOGY_MAPPER Lut\r
125 set_global_assignment -name STRATIXII_OPTIMIZATION_TECHNIQUE Balanced\r
126 set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE Balanced\r
127 set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE Balanced\r
128 set_global_assignment -name STRATIX_OPTIMIZATION_TECHNIQUE Balanced\r
129 set_global_assignment -name MAXII_OPTIMIZATION_TECHNIQUE Balanced\r
130 set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE Speed\r
131 set_global_assignment -name APEX20K_OPTIMIZATION_TECHNIQUE Balanced\r
132 set_global_assignment -name MERCURY_OPTIMIZATION_TECHNIQUE Area\r
133 set_global_assignment -name FLEX6K_OPTIMIZATION_TECHNIQUE Area\r
134 set_global_assignment -name FLEX10K_OPTIMIZATION_TECHNIQUE Area\r
135 set_global_assignment -name ALLOW_XOR_GATE_USAGE On\r
136 set_global_assignment -name AUTO_LCELL_INSERTION On\r
137 set_global_assignment -name CARRY_CHAIN_LENGTH 48\r
138 set_global_assignment -name FLEX6K_CARRY_CHAIN_LENGTH 32\r
139 set_global_assignment -name FLEX10K_CARRY_CHAIN_LENGTH 32\r
140 set_global_assignment -name MERCURY_CARRY_CHAIN_LENGTH 48\r
141 set_global_assignment -name STRATIX_CARRY_CHAIN_LENGTH 70\r
142 set_global_assignment -name STRATIXII_CARRY_CHAIN_LENGTH 70\r
143 set_global_assignment -name CASCADE_CHAIN_LENGTH 2\r
144 set_global_assignment -name PARALLEL_EXPANDER_CHAIN_LENGTH 16\r
145 set_global_assignment -name MAX7000_PARALLEL_EXPANDER_CHAIN_LENGTH 4\r
146 set_global_assignment -name AUTO_CARRY_CHAINS On\r
147 set_global_assignment -name AUTO_CASCADE_CHAINS On\r
148 set_global_assignment -name AUTO_PARALLEL_EXPANDERS On\r
149 set_global_assignment -name AUTO_OPEN_DRAIN_PINS On\r
150 set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP Off\r
151 set_global_assignment -name ADV_NETLIST_OPT_SYNTH_GATE_RETIME Off\r
152 set_global_assignment -name ADV_NETLIST_OPT_RETIME_CORE_AND_IO On\r
153 set_global_assignment -name AUTO_ROM_RECOGNITION On\r
154 set_global_assignment -name AUTO_RAM_RECOGNITION On\r
155 set_global_assignment -name AUTO_DSP_RECOGNITION On\r
156 set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION Auto\r
157 set_global_assignment -name AUTO_CLOCK_ENABLE_RECOGNITION On\r
158 set_global_assignment -name ALLOW_SYNCH_CTRL_USAGE On\r
159 set_global_assignment -name FORCE_SYNCH_CLEAR Off\r
160 set_global_assignment -name AUTO_RAM_BLOCK_BALANCING On\r
161 set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION Off\r
162 set_global_assignment -name AUTO_RESOURCE_SHARING Off\r
163 set_global_assignment -name ALLOW_ANY_RAM_SIZE_FOR_RECOGNITION Off\r
164 set_global_assignment -name ALLOW_ANY_ROM_SIZE_FOR_RECOGNITION Off\r
165 set_global_assignment -name ALLOW_ANY_SHIFT_REGISTER_SIZE_FOR_RECOGNITION Off\r
166 set_global_assignment -name MAX7000_FANIN_PER_CELL 100\r
167 set_global_assignment -name MAX_RAM_BLOCKS_M512 "-1 (Unlimited)"\r
168 set_global_assignment -name MAX_RAM_BLOCKS_M4K "-1 (Unlimited)"\r
169 set_global_assignment -name MAX_RAM_BLOCKS_MRAM "-1 (Unlimited)"\r
170 set_global_assignment -name IGNORE_TRANSLATE_OFF_AND_SYNTHESIS_OFF Off\r
171 set_global_assignment -name STRATIXGX_BYPASS_REMAPPING_OF_FORCE_SIGNAL_DETECT_SIGNAL_THRESHOLD_SELECT Off\r
172 set_global_assignment -name SHOW_PARAMETER_SETTINGS_TABLES_IN_SYNTHESIS_REPORT On\r
173 set_global_assignment -name IGNORE_MAX_FANOUT_ASSIGNMENTS Off\r
174 set_global_assignment -name ADV_NETLIST_OPT_METASTABLE_REGS 2\r
175 set_global_assignment -name OPTIMIZE_POWER_DURING_SYNTHESIS "Normal compilation"\r
176 set_global_assignment -name HDL_MESSAGE_LEVEL Level2\r
177 set_global_assignment -name SUPPRESS_REG_MINIMIZATION_MSG Off\r
178 set_global_assignment -name USE_HIGH_SPEED_ADDER Auto\r
179 set_global_assignment -name NUMBER_OF_REMOVED_REGISTERS_REPORTED 100\r
180 set_global_assignment -name SYNTH_CLOCK_MUX_PROTECTION On\r
181 set_global_assignment -name BLOCK_DESIGN_NAMING Auto\r
182 set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL Normal\r
183 set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.0\r
184 set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 1.0\r
185 set_global_assignment -name FIT_ATTEMPTS_TO_SKIP 0.0\r
186 set_global_assignment -name ECO_ALLOW_ROUTING_CHANGES Off\r
187 set_global_assignment -name DEVICE AUTO\r
188 set_global_assignment -name BASE_PIN_OUT_FILE_ON_SAMEFRAME_DEVICE Off\r
189 set_global_assignment -name ENABLE_JTAG_BST_SUPPORT Off\r
190 set_global_assignment -name MAX7000_ENABLE_JTAG_BST_SUPPORT On\r
191 set_global_assignment -name RESERVE_NCEO_AFTER_CONFIGURATION "Use as regular IO"\r
192 set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "Use as programming pin"\r
193 set_global_assignment -name STRATIXIII_UPDATE_MODE Standard\r
194 set_global_assignment -name STRATIX_UPDATE_MODE Standard\r
195 set_global_assignment -name STRATIXIII_CONFIGURATION_SCHEME "Passive Serial"\r
196 set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "Active Serial"\r
197 set_global_assignment -name STRATIXII_CONFIGURATION_SCHEME "Passive Serial"\r
198 set_global_assignment -name CYCLONEII_CONFIGURATION_SCHEME "Active Serial"\r
199 set_global_assignment -name APEX20K_CONFIGURATION_SCHEME "Passive Serial"\r
200 set_global_assignment -name STRATIX_CONFIGURATION_SCHEME "Passive Serial"\r
201 set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "Active Serial"\r
202 set_global_assignment -name MERCURY_CONFIGURATION_SCHEME "Passive Serial"\r
203 set_global_assignment -name FLEX6K_CONFIGURATION_SCHEME "Passive Serial"\r
204 set_global_assignment -name FLEX10K_CONFIGURATION_SCHEME "Passive Serial"\r
205 set_global_assignment -name APEXII_CONFIGURATION_SCHEME "Passive Serial"\r
206 set_global_assignment -name USER_START_UP_CLOCK Off\r
207 set_global_assignment -name ENABLE_VREFA_PIN Off\r
208 set_global_assignment -name ENABLE_VREFB_PIN Off\r
209 set_global_assignment -name ALWAYS_ENABLE_INPUT_BUFFERS Off\r
210 set_global_assignment -name ENABLE_ASMI_FOR_FLASH_LOADER Off\r
211 set_global_assignment -name ENABLE_DEVICE_WIDE_RESET Off\r
212 set_global_assignment -name ENABLE_DEVICE_WIDE_OE Off\r
213 set_global_assignment -name RESERVE_ALL_UNUSED_PINS "As output driving ground"\r
214 set_global_assignment -name FLEX10K_ENABLE_LOCK_OUTPUT Off\r
215 set_global_assignment -name ENABLE_INIT_DONE_OUTPUT Off\r
216 set_global_assignment -name RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION "Use as regular IO"\r
217 set_global_assignment -name RESERVE_RDYNBUSY_AFTER_CONFIGURATION "Use as regular IO"\r
218 set_global_assignment -name RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION "Use as regular IO"\r
219 set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "As input tri-stated"\r
220 set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "Use as regular IO"\r
221 set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "As input tri-stated"\r
222 set_global_assignment -name RESERVE_DATA7_THROUGH_DATA2_AFTER_CONFIGURATION "Use as regular IO"\r
223 set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "As input tri-stated"\r
224 set_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION "Use as regular IO"\r
225 set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "Use as programming pin"\r
226 set_global_assignment -name CRC_ERROR_CHECKING Off\r
227 set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO Paths and Minimum TPD Paths"\r
228 set_global_assignment -name OPTIMIZE_FAST_CORNER_TIMING Off\r
229 set_global_assignment -name BLOCK_RAM_TO_MLAB_CELL_CONVERSION On\r
230 set_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_POWER_UP_CONDITIONS Auto\r
231 set_global_assignment -name BLOCK_RAM_AND_MLAB_EQUIVALENT_PAUSED_READ_CAPABILITIES Care\r
232 set_global_assignment -name PROGRAMMABLE_POWER_TECHNOLOGY_SETTING Automatic\r
233 set_global_assignment -name PROGRAMMABLE_POWER_MAXIMUM_HIGH_SPEED_FRACTION_OF_USED_LAB_TILES 1.0\r
234 set_global_assignment -name GUARANTEE_MIN_DELAY_CORNER_IO_ZERO_HOLD_TIME On\r
235 set_global_assignment -name OPTIMIZE_POWER_DURING_FITTING "Normal compilation"\r
236 set_global_assignment -name OPTIMIZE_TIMING "Normal compilation"\r
237 set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING On\r
238 set_global_assignment -name FIT_ONLY_ONE_ATTEMPT Off\r
239 set_global_assignment -name FINAL_PLACEMENT_OPTIMIZATION Automatically\r
240 set_global_assignment -name FITTER_AGGRESSIVE_ROUTABILITY_OPTIMIZATION Automatically\r
241 set_global_assignment -name SEED 1\r
242 set_global_assignment -name SLOW_SLEW_RATE Off\r
243 set_global_assignment -name PCI_IO Off\r
244 set_global_assignment -name TURBO_BIT On\r
245 set_global_assignment -name WEAK_PULL_UP_RESISTOR Off\r
246 set_global_assignment -name ENABLE_BUS_HOLD_CIRCUITRY Off\r
247 set_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS Off\r
248 set_global_assignment -name MIGRATION_CONSTRAIN_CORE_RESOURCES On\r
249 set_global_assignment -name AUTO_PACKED_REGISTERS_STRATIXII AUTO\r
250 set_global_assignment -name AUTO_PACKED_REGISTERS_MAXII AUTO\r
251 set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE Auto\r
252 set_global_assignment -name AUTO_PACKED_REGISTERS Off\r
253 set_global_assignment -name AUTO_PACKED_REGISTERS_STRATIX AUTO\r
254 set_global_assignment -name NORMAL_LCELL_INSERT On\r
255 set_global_assignment -name CARRY_OUT_PINS_LCELL_INSERT On\r
256 set_global_assignment -name AUTO_DELAY_CHAINS On\r
257 set_global_assignment -name XSTL_INPUT_ALLOW_SE_BUFFER Off\r
258 set_global_assignment -name TREAT_BIDIR_AS_OUTPUT Off\r
259 set_global_assignment -name AUTO_MERGE_PLLS On\r
260 set_global_assignment -name IGNORE_MODE_FOR_MERGE Off\r
261 set_global_assignment -name AUTO_TURBO_BIT ON\r
262 set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA Off\r
263 set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC Off\r
264 set_global_assignment -name PHYSICAL_SYNTHESIS_LOG_FILE Off\r
265 set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION Off\r
266 set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA Off\r
267 set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING Off\r
268 set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING Off\r
269 set_global_assignment -name IO_PLACEMENT_OPTIMIZATION On\r
270 set_global_assignment -name ALLOW_LVTTL_LVCMOS_INPUT_LEVELS_TO_OVERDRIVE_INPUT_BUFFER Off\r
271 set_global_assignment -name OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS Off\r
272 set_global_assignment -name FITTER_EFFORT "Auto Fit"\r
273 set_global_assignment -name FITTER_AUTO_EFFORT_DESIRED_SLACK_MARGIN 0ns\r
274 set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT Normal\r
275 set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION AUTO\r
276 set_global_assignment -name ROUTER_REGISTER_DUPLICATION AUTO\r
277 set_global_assignment -name STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET Off\r
278 set_global_assignment -name AUTO_GLOBAL_CLOCK On\r
279 set_global_assignment -name AUTO_GLOBAL_OE On\r
280 set_global_assignment -name AUTO_GLOBAL_REGISTER_CONTROLS On\r
281 set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE Realistic\r
282 set_global_assignment -name STRATIXGX_ALLOW_GIGE_UNDER_FULL_DATARATE_RANGE Off\r
283 set_global_assignment -name STRATIXGX_ALLOW_RX_CORECLK_FROM_NON_RX_CLKOUT_SOURCE_IN_DOUBLE_DATA_WIDTH_MODE Off\r
284 set_global_assignment -name STRATIXGX_ALLOW_GIGE_IN_DOUBLE_DATA_WIDTH_MODE Off\r
285 set_global_assignment -name STRATIXGX_ALLOW_PARALLEL_LOOPBACK_IN_DOUBLE_DATA_WIDTH_MODE Off\r
286 set_global_assignment -name STRATIXGX_ALLOW_XAUI_IN_SINGLE_DATA_WIDTH_MODE Off\r
287 set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off\r
288 set_global_assignment -name STRATIXGX_ALLOW_XAUI_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off\r
289 set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_CORECLK_SELECTED_AT_RATE_MATCHER Off\r
290 set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITHOUT_8B10B Off\r
291 set_global_assignment -name STRATIXGX_ALLOW_GIGE_WITH_RX_CORECLK_FROM_NON_TXPLL_SOURCE Off\r
292 set_global_assignment -name STRATIXGX_ALLOW_POST8B10B_LOOPBACK Off\r
293 set_global_assignment -name STRATIXGX_ALLOW_REVERSE_PARALLEL_LOOPBACK Off\r
294 set_global_assignment -name STRATIXGX_ALLOW_USE_OF_GXB_COUPLED_IOS Off\r
295 set_global_assignment -name GENERATE_GXB_RECONFIG_MIF Off\r
296 set_global_assignment -name GENERATE_GXB_RECONFIG_MIF_WITH_PLL Off\r
297 set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "As input tri-stated with weak pull-up"\r
298 set_global_assignment -name STOP_AFTER_CONGESTION_MAP Off\r
299 set_global_assignment -name SAVE_INTERMEDIATE_FITTING_RESULTS Off\r
300 set_global_assignment -name ENABLE_HOLD_BACK_OFF On\r
301 set_global_assignment -name CONFIGURATION_VCCIO_LEVEL Auto\r
302 set_global_assignment -name FORCE_CONFIGURATION_VCCIO Off\r
303 set_global_assignment -name EDA_SIMULATION_TOOL "<None>"\r
304 set_global_assignment -name EDA_TIMING_ANALYSIS_TOOL "<None>"\r
305 set_global_assignment -name EDA_BOARD_DESIGN_TIMING_TOOL "<None>"\r
306 set_global_assignment -name EDA_BOARD_DESIGN_SYMBOL_TOOL "<None>"\r
307 set_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL "<None>"\r
308 set_global_assignment -name EDA_BOARD_DESIGN_TOOL "<None>"\r
309 set_global_assignment -name EDA_FORMAL_VERIFICATION_TOOL "<None>"\r
310 set_global_assignment -name EDA_RESYNTHESIS_TOOL "<None>"\r
311 set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION On\r
312 set_global_assignment -name COMPRESSION_MODE Off\r
313 set_global_assignment -name CLOCK_SOURCE Internal\r
314 set_global_assignment -name CONFIGURATION_CLOCK_FREQUENCY "10 MHz"\r
315 set_global_assignment -name CONFIGURATION_CLOCK_DIVISOR 1\r
316 set_global_assignment -name ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On\r
317 set_global_assignment -name FLEX6K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE Off\r
318 set_global_assignment -name FLEX10K_ENABLE_LOW_VOLTAGE_MODE_ON_CONFIG_DEVICE On\r
319 set_global_assignment -name MAX7000S_JTAG_USER_CODE FFFF\r
320 set_global_assignment -name STRATIX_JTAG_USER_CODE FFFFFFFF\r
321 set_global_assignment -name APEX20K_JTAG_USER_CODE FFFFFFFF\r
322 set_global_assignment -name MERCURY_JTAG_USER_CODE FFFFFFFF\r
323 set_global_assignment -name FLEX10K_JTAG_USER_CODE 7F\r
324 set_global_assignment -name MAX7000_JTAG_USER_CODE FFFFFFFF\r
325 set_global_assignment -name MAX7000_USE_CHECKSUM_AS_USERCODE Off\r
326 set_global_assignment -name USE_CHECKSUM_AS_USERCODE Off\r
327 set_global_assignment -name SECURITY_BIT Off\r
328 set_global_assignment -name USE_CONFIGURATION_DEVICE On\r
329 set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE Auto\r
330 set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE Auto\r
331 set_global_assignment -name APEX20K_CONFIGURATION_DEVICE Auto\r
332 set_global_assignment -name MERCURY_CONFIGURATION_DEVICE Auto\r
333 set_global_assignment -name FLEX6K_CONFIGURATION_DEVICE Auto\r
334 set_global_assignment -name FLEX10K_CONFIGURATION_DEVICE Auto\r
335 set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE Auto\r
336 set_global_assignment -name STRATIX_CONFIGURATION_DEVICE Auto\r
337 set_global_assignment -name APEX20K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r
338 set_global_assignment -name STRATIX_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r
339 set_global_assignment -name MERCURY_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r
340 set_global_assignment -name FLEX10K_CONFIG_DEVICE_JTAG_USER_CODE FFFFFFFF\r
341 set_global_assignment -name EPROM_USE_CHECKSUM_AS_USERCODE Off\r
342 set_global_assignment -name AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE On\r
343 set_global_assignment -name DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE Off\r
344 set_global_assignment -name GENERATE_TTF_FILE Off\r
345 set_global_assignment -name GENERATE_RBF_FILE Off\r
346 set_global_assignment -name GENERATE_HEX_FILE Off\r
347 set_global_assignment -name HEXOUT_FILE_START_ADDRESS 0\r
348 set_global_assignment -name HEXOUT_FILE_COUNT_DIRECTION Up\r
349 set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "As output driving an unspecified signal"\r
350 set_global_assignment -name RELEASE_CLEARS_BEFORE_TRI_STATES Off\r
351 set_global_assignment -name AUTO_RESTART_CONFIGURATION On\r
352 set_global_assignment -name HARDCOPYII_POWER_ON_EXTRA_DELAY Off\r
353 set_global_assignment -name STRATIXII_MRAM_COMPATIBILITY Off\r
354 set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY On\r
355 set_global_assignment -name ENABLE_OCT_DONE Off\r
356 set_global_assignment -name USE_CHECKERED_PATTERN_AS_UNINITIALIZED_RAM_CONTENT Off\r
357 set_global_assignment -name START_TIME 0ns\r
358 set_global_assignment -name SIMULATION_MODE TIMING\r
359 set_global_assignment -name AUTO_USE_SIMULATION_PDB_NETLIST Off\r
360 set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS On\r
361 set_global_assignment -name SETUP_HOLD_DETECTION Off\r
362 set_global_assignment -name SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off\r
363 set_global_assignment -name CHECK_OUTPUTS Off\r
364 set_global_assignment -name SIMULATION_COVERAGE On\r
365 set_global_assignment -name SIMULATION_COMPLETE_COVERAGE_REPORT_PANEL On\r
366 set_global_assignment -name SIMULATION_MISSING_1_VALUE_COVERAGE_REPORT_PANEL On\r
367 set_global_assignment -name SIMULATION_MISSING_0_VALUE_COVERAGE_REPORT_PANEL On\r
368 set_global_assignment -name GLITCH_DETECTION Off\r
369 set_global_assignment -name GLITCH_INTERVAL 1ns\r
370 set_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE Off\r
371 set_global_assignment -name SIMULATION_WITH_GLITCH_FILTERING_WHEN_GENERATING_SAF On\r
372 set_global_assignment -name SIMULATION_BUS_CHANNEL_GROUPING Off\r
373 set_global_assignment -name SIMULATION_VDB_RESULT_FLUSH On\r
374 set_global_assignment -name VECTOR_COMPARE_TRIGGER_MODE INPUT_EDGE\r
375 set_global_assignment -name SIMULATION_NETLIST_VIEWER Off\r
376 set_global_assignment -name SIMULATION_INTERCONNECT_DELAY_MODEL_TYPE TRANSPORT\r
377 set_global_assignment -name SIMULATION_CELL_DELAY_MODEL_TYPE TRANSPORT\r
378 set_global_assignment -name SIMULATOR_GENERATE_POWERPLAY_VCD_FILE Off\r
379 set_global_assignment -name SIMULATOR_PVT_TIMING_MODEL_TYPE AUTO\r
380 set_global_assignment -name SIMULATION_WITH_AUTO_GLITCH_FILTERING AUTO\r
381 set_global_assignment -name DRC_TOP_FANOUT 50\r
382 set_global_assignment -name DRC_FANOUT_EXCEEDING 30\r
383 set_global_assignment -name DRC_GATED_CLOCK_FEED 30\r
384 set_global_assignment -name HARDCOPY_FLOW_AUTOMATION MIGRATION_ONLY\r
385 set_global_assignment -name ENABLE_DRC_SETTINGS Off\r
386 set_global_assignment -name CLK_RULE_CLKNET_CLKSPINES_THRESHOLD 25\r
387 set_global_assignment -name DRC_DETAIL_MESSAGE_LIMIT 10\r
388 set_global_assignment -name DRC_VIOLATION_MESSAGE_LIMIT 30\r
389 set_global_assignment -name DRC_DEADLOCK_STATE_LIMIT 2\r
390 set_global_assignment -name MERGE_HEX_FILE Off\r
391 set_global_assignment -name GENERATE_SVF_FILE Off\r
392 set_global_assignment -name GENERATE_ISC_FILE Off\r
393 set_global_assignment -name GENERATE_JAM_FILE Off\r
394 set_global_assignment -name GENERATE_JBC_FILE Off\r
395 set_global_assignment -name GENERATE_JBC_FILE_COMPRESSED On\r
396 set_global_assignment -name GENERATE_CONFIG_SVF_FILE Off\r
397 set_global_assignment -name GENERATE_CONFIG_ISC_FILE Off\r
398 set_global_assignment -name GENERATE_CONFIG_JAM_FILE Off\r
399 set_global_assignment -name GENERATE_CONFIG_JBC_FILE Off\r
400 set_global_assignment -name GENERATE_CONFIG_JBC_FILE_COMPRESSED On\r
401 set_global_assignment -name GENERATE_CONFIG_HEXOUT_FILE Off\r
402 set_global_assignment -name ISP_CLAMP_STATE_DEFAULT "Tri-state"\r
403 set_global_assignment -name SIGNALPROBE_ALLOW_OVERUSE Off\r
404 set_global_assignment -name SIGNALPROBE_DURING_NORMAL_COMPILATION Off\r
405 set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT Off\r
406 set_global_assignment -name POWER_DEFAULT_TOGGLE_RATE 12.5%\r
407 set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE 12.5%\r
408 set_global_assignment -name POWER_USE_PVA On\r
409 set_global_assignment -name POWER_USE_INPUT_FILE "No File"\r
410 set_global_assignment -name POWER_USE_INPUT_FILES Off\r
411 set_global_assignment -name POWER_VCD_FILTER_GLITCHES On\r
412 set_global_assignment -name POWER_REPORT_SIGNAL_ACTIVITY -value ON\r
413 set_global_assignment -name POWER_REPORT_POWER_DISSIPATION -value ON\r
414 set_global_assignment -name POWER_USE_DEVICE_CHARACTERISTICS TYPICAL\r
415 set_global_assignment -name POWER_AUTO_COMPUTE_TJ On\r
416 set_global_assignment -name POWER_TJ_VALUE 25\r
417 set_global_assignment -name POWER_USE_TA_VALUE 25\r
418 set_global_assignment -name POWER_USE_CUSTOM_COOLING_SOLUTION Off\r
419 set_global_assignment -name POWER_BOARD_TEMPERATURE 25\r
420 set_global_assignment -name INCREMENTAL_COMPILATION -value FULL_INCREMENTAL_COMPILATION\r
421 set_global_assignment -name AUTO_EXPORT_INCREMENTAL_COMPILATION Off\r
422 set_global_assignment -name INCREMENTAL_COMPILATION_EXPORT_NETLIST_TYPE POST_FIT\r
423 set_global_assignment -name RTLV_REMOVE_FANOUT_FREE_REGISTERS On\r
424 set_global_assignment -name RTLV_SIMPLIFIED_LOGIC On\r
425 set_global_assignment -name RTLV_GROUP_RELATED_NODES On\r
426 set_global_assignment -name RTLV_GROUP_COMB_LOGIC_IN_CLOUD Off\r
427 set_global_assignment -name EQC_CONSTANT_DFF_DETECTION On\r
428 set_global_assignment -name EQC_DUPLICATE_DFF_DETECTION On\r
429 set_global_assignment -name EQC_BBOX_MERGE On\r
430 set_global_assignment -name EQC_LVDS_MERGE On\r
431 set_global_assignment -name EQC_RAM_UNMERGING On\r
432 set_global_assignment -name EQC_DFF_SS_EMULATION On\r
433 set_global_assignment -name EQC_RAM_REGISTER_UNPACK On\r
434 set_global_assignment -name EQC_MAC_REGISTER_UNPACK On\r
435 set_global_assignment -name EQC_SET_PARTITION_BB_TO_VCC_GND On\r
436 set_global_assignment -name EQC_STRUCTURE_MATCHING On\r
437 set_global_assignment -name EQC_AUTO_BREAK_CONE On\r
438 set_global_assignment -name EQC_POWER_UP_COMPARE Off\r
439 set_global_assignment -name EQC_AUTO_COMP_LOOP_CUT On\r
440 set_global_assignment -name EQC_AUTO_INVERSION On\r
441 set_global_assignment -name EQC_AUTO_TERMINATE On\r
442 set_global_assignment -name EQC_SUB_CONE_REPORT Off\r
443 set_global_assignment -name EQC_RENAMING_RULES On\r
444 set_global_assignment -name EQC_PARAMETER_CHECK On\r
445 set_global_assignment -name EQC_AUTO_PORTSWAP On\r
446 set_global_assignment -name EQC_DETECT_DONT_CARES On\r
447 set_global_assignment -name EQC_SHOW_ALL_MAPPED_POINTS Off\r
448 set_global_assignment -name DUTY_CYCLE 50 -section_id ?\r
449 set_global_assignment -name INVERT_BASE_CLOCK Off -section_id ?\r
450 set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id ?\r
451 set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id ?\r
452 set_global_assignment -name EDA_INPUT_GND_NAME GND -section_id ?\r
453 set_global_assignment -name EDA_INPUT_VCC_NAME VCC -section_id ?\r
454 set_global_assignment -name EDA_INPUT_DATA_FORMAT NONE -section_id ?\r
455 set_global_assignment -name EDA_SHOW_LMF_MAPPING_MESSAGES Off -section_id ?\r
456 set_global_assignment -name EDA_RUN_TOOL_AUTOMATICALLY Off -section_id ?\r
457 set_global_assignment -name RESYNTHESIS_RETIMING FULL -section_id ?\r
458 set_global_assignment -name RESYNTHESIS_OPTIMIZATION_EFFORT Normal -section_id ?\r
459 set_global_assignment -name RESYNTHESIS_PHYSICAL_SYNTHESIS Normal -section_id ?\r
460 set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS On -section_id ?\r
461 set_global_assignment -name VCCPD_VOLTAGE 3.3V -section_id ?\r
462 set_global_assignment -name EDA_LAUNCH_CMD_LINE_TOOL Off -section_id ?\r
463 set_global_assignment -name EDA_TRUNCATE_LONG_HIERARCHY_PATHS Off -section_id ?\r
464 set_global_assignment -name EDA_FLATTEN_BUSES Off -section_id ?\r
465 set_global_assignment -name EDA_MAP_ILLEGAL_CHARACTERS Off -section_id ?\r
466 set_global_assignment -name EDA_GENERATE_TIMING_CLOSURE_DATA Off -section_id ?\r
467 set_global_assignment -name EDA_GENERATE_POWER_INPUT_FILE Off -section_id ?\r
468 set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS NOT_USED -section_id ?\r
469 set_global_assignment -name EDA_RTL_SIM_MODE NOT_USED -section_id ?\r
470 set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY Off -section_id ?\r
471 set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST Off -section_id ?\r
472 set_global_assignment -name EDA_WRITE_DEVICE_CONTROL_PORTS Off -section_id ?\r
473 set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_TCL_FILE Off -section_id ?\r
474 set_global_assignment -name EDA_SIMULATION_VCD_OUTPUT_SIGNALS_TO_TCL_FILE "All Except Combinational Logic Element Outputs" -section_id ?\r
475 set_global_assignment -name EDA_ENABLE_GLITCH_FILTERING Off -section_id ?\r
476 set_global_assignment -name EDA_WRITE_NODES_FOR_POWER_ESTIMATION OFF -section_id ?\r
477 set_global_assignment -name EDA_SETUP_HOLD_DETECTION_INPUT_REGISTERS_BIDIR_PINS_DISABLED Off -section_id ?\r
478 set_global_assignment -name EDA_WRITER_DONT_WRITE_TOP_ENTITY Off -section_id ?\r
479 set_global_assignment -name EDA_VHDL_ARCH_NAME structure -section_id ?\r
480 set_global_assignment -name EDA_IBIS_MODEL_SELECTOR Off -section_id ?\r
481 set_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_OFFSET 0ns -section_id ?\r
482 set_global_assignment -name SIM_VECTOR_COMPARED_CLOCK_DUTY_CYCLE 50 -section_id ?\r
483 set_global_assignment -name APEX20K_CLIQUE_TYPE LAB -section_id ? -entity ?\r
484 set_global_assignment -name MAX7K_CLIQUE_TYPE LAB -section_id ? -entity ?\r
485 set_global_assignment -name MERCURY_CLIQUE_TYPE LAB -section_id ? -entity ?\r
486 set_global_assignment -name FLEX6K_CLIQUE_TYPE LAB -section_id ? -entity ?\r
487 set_global_assignment -name FLEX10K_CLIQUE_TYPE LAB -section_id ? -entity ?\r
488 set_global_assignment -name PARTITION_IMPORT_ASSIGNMENTS On -section_id ? -entity ?\r
489 set_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -section_id ? -entity ?\r
490 set_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS REPLACE_CONFLICTING -section_id ? -entity ?\r
491 set_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS On -section_id ? -entity ?\r