sys/powerpc/fpu/fpu_add.c

   1 /*      $NetBSD: fpu_add.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */
   2
   3 /*
   4  * Copyright (c) 1992, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * This software was developed by the Computer Systems Engineering group
   8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
   9  * contributed to Berkeley.
  10  *
  11  * All advertising materials mentioning features or use of this software
  12  * must display the following acknowledgement:
  13  *      This product includes software developed by the University of
  14  *      California, Lawrence Berkeley Laboratory.
  15  *
  16  * Redistribution and use in source and binary forms, with or without
  17  * modification, are permitted provided that the following conditions
  18  * are met:
  19  * 1. Redistributions of source code must retain the above copyright
  20  *    notice, this list of conditions and the following disclaimer.
  21  * 2. Redistributions in binary form must reproduce the above copyright
  22  *    notice, this list of conditions and the following disclaimer in the
  23  *    documentation and/or other materials provided with the distribution.
  24  * 3. Neither the name of the University nor the names of its contributors
  25  *    may be used to endorse or promote products derived from this software
  26  *    without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  38  * SUCH DAMAGE.
  39  *
  40  *      @(#)fpu_add.c   8.1 (Berkeley) 6/11/93
  41  */
  42
  43 /*
  44  * Perform an FPU add (return x + y).
  45  *
  46  * To subtract, negate y and call add.
  47  */
  48
  49 #include <sys/cdefs.h>
  50 __FBSDID("$FreeBSD$");
  51
  52 #include <sys/types.h>
  53 #include <sys/systm.h>
  54
  55 #include <machine/fpu.h>
  56 #include <machine/ieeefp.h>
  57 #include <machine/reg.h>
  58
  59 #include <powerpc/fpu/fpu_arith.h>
  60 #include <powerpc/fpu/fpu_emu.h>
  61
  62 struct fpn *
  63 fpu_add(struct fpemu *fe)
  64 {
  65         struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
  66         u_int r0, r1, r2, r3;
  67         int rd;
  68
  69         /*
  70          * Put the `heavier' operand on the right (see fpu_emu.h).
  71          * Then we will have one of the following cases, taken in the
  72          * following order:
  73          *
  74          *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
  75          *      The result is y.
  76          *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
  77          *    case was taken care of earlier).
  78          *      If x = -y, the result is NaN.  Otherwise the result
  79          *      is y (an Inf of whichever sign).
  80          *  - y is 0.  Implied: x = 0.
  81          *      If x and y differ in sign (one positive, one negative),
  82          *      the result is +0 except when rounding to -Inf.  If same:
  83          *      +0 + +0 = +0; -0 + -0 = -0.
  84          *  - x is 0.  Implied: y != 0.
  85          *      Result is y.
  86          *  - other.  Implied: both x and y are numbers.
  87          *      Do addition a la Hennessey & Patterson.
  88          */
  89         DPRINTF(FPE_REG, ("fpu_add:\n"));
  90         DUMPFPN(FPE_REG, x);
  91         DUMPFPN(FPE_REG, y);
  92         DPRINTF(FPE_REG, ("=>\n"));
  93         ORDER(x, y);
  94         if (ISNAN(y)) {
  95                 fe->fe_cx |= FPSCR_VXSNAN;
  96                 DUMPFPN(FPE_REG, y);
  97                 return (y);
  98         }
  99         if (ISINF(y)) {
 100                 if (ISINF(x) && x->fp_sign != y->fp_sign) {
 101                         fe->fe_cx |= FPSCR_VXISI;
 102                         return (fpu_newnan(fe));
 103                 }
 104                 DUMPFPN(FPE_REG, y);
 105                 return (y);
 106         }
 107         rd = ((fe->fe_fpscr) & FPSCR_RN);
 108         if (ISZERO(y)) {
 109                 if (rd != FP_RM)        /* only -0 + -0 gives -0 */
 110                         y->fp_sign &= x->fp_sign;
 111                 else                    /* any -0 operand gives -0 */
 112                         y->fp_sign |= x->fp_sign;
 113                 DUMPFPN(FPE_REG, y);
 114                 return (y);
 115         }
 116         if (ISZERO(x)) {
 117                 DUMPFPN(FPE_REG, y);
 118                 return (y);
 119         }
 120         /*
 121          * We really have two numbers to add, although their signs may
 122          * differ.  Make the exponents match, by shifting the smaller
 123          * number right (e.g., 1.011 => 0.1011) and increasing its
 124          * exponent (2^3 => 2^4).  Note that we do not alter the exponents
 125          * of x and y here.
 126          */
 127         r = &fe->fe_f3;
 128         r->fp_class = FPC_NUM;
 129         if (x->fp_exp == y->fp_exp) {
 130                 r->fp_exp = x->fp_exp;
 131                 r->fp_sticky = 0;
 132         } else {
 133                 if (x->fp_exp < y->fp_exp) {
 134                         /*
 135                          * Try to avoid subtract case iii (see below).
 136                          * This also guarantees that x->fp_sticky = 0.
 137                          */
 138                         SWAP(x, y);
 139                 }
 140                 /* now x->fp_exp > y->fp_exp */
 141                 r->fp_exp = x->fp_exp;
 142                 r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp);
 143         }
 144         r->fp_sign = x->fp_sign;
 145         if (x->fp_sign == y->fp_sign) {
 146                 FPU_DECL_CARRY
 147
 148                 /*
 149                  * The signs match, so we simply add the numbers.  The result
 150                  * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
 151                  * 11.111...0).  If so, a single bit shift-right will fix it
 152                  * (but remember to adjust the exponent).
 153                  */
 154                 /* r->fp_mant = x->fp_mant + y->fp_mant */
 155                 FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
 156                 FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
 157                 FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
 158                 FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
 159                 if ((r->fp_mant[0] = r0) >= FP_2) {
 160                         (void) fpu_shr(r, 1);
 161                         r->fp_exp++;
 162                 }
 163         } else {
 164                 FPU_DECL_CARRY
 165
 166                 /*
 167                  * The signs differ, so things are rather more difficult.
 168                  * H&P would have us negate the negative operand and add;
 169                  * this is the same as subtracting the negative operand.
 170                  * This is quite a headache.  Instead, we will subtract
 171                  * y from x, regardless of whether y itself is the negative
 172                  * operand.  When this is done one of three conditions will
 173                  * hold, depending on the magnitudes of x and y:
 174                  *   case i)   |x| > |y|.  The result is just x - y,
 175                  *      with x's sign, but it may need to be normalized.
 176                  *   case ii)  |x| = |y|.  The result is 0 (maybe -0)
 177                  *      so must be fixed up.
 178                  *   case iii) |x| < |y|.  We goofed; the result should
 179                  *      be (y - x), with the same sign as y.
 180                  * We could compare |x| and |y| here and avoid case iii,
 181                  * but that would take just as much work as the subtract.
 182                  * We can tell case iii has occurred by an overflow.
 183                  *
 184                  * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
 185                  */
 186                 /* r->fp_mant = x->fp_mant - y->fp_mant */
 187                 FPU_SET_CARRY(y->fp_sticky);
 188                 FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
 189                 FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
 190                 FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
 191                 FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
 192                 if (r0 < FP_2) {
 193                         /* cases i and ii */
 194                         if ((r0 | r1 | r2 | r3) == 0) {
 195                                 /* case ii */
 196                                 r->fp_class = FPC_ZERO;
 197                                 r->fp_sign = rd == FP_RM;
 198                                 return (r);
 199                         }
 200                 } else {
 201                         /*
 202                          * Oops, case iii.  This can only occur when the
 203                          * exponents were equal, in which case neither
 204                          * x nor y have sticky bits set.  Flip the sign
 205                          * (to y's sign) and negate the result to get y - x.
 206                          */
 207 #ifdef DIAGNOSTIC
 208                         if (x->fp_exp != y->fp_exp || r->fp_sticky)
 209                                 panic("fpu_add");
 210 #endif
 211                         r->fp_sign = y->fp_sign;
 212                         FPU_SUBS(r3, 0, r3);
 213                         FPU_SUBCS(r2, 0, r2);
 214                         FPU_SUBCS(r1, 0, r1);
 215                         FPU_SUBC(r0, 0, r0);
 216                 }
 217                 r->fp_mant[3] = r3;
 218                 r->fp_mant[2] = r2;
 219                 r->fp_mant[1] = r1;
 220                 r->fp_mant[0] = r0;
 221                 if (r0 < FP_1)
 222                         fpu_norm(r);
 223         }
 224         DUMPFPN(FPE_REG, r);
 225         return (r);
 226 }